summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/intel_bufmgr_gem.c
blob: cf84e6269685471a52997183ad86d6077498653c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
/**************************************************************************
 *
 * Copyright © 2007 Red Hat Inc.
 * Copyright © 2007-2012 Intel Corporation
 * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 *
 **************************************************************************/
/*
 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
 *          Keith Whitwell <keithw-at-tungstengraphics-dot-com>
 *	    Eric Anholt <eric@anholt.net>
 *	    Dave Airlie <airlied@linux.ie>
 */

#ifdef HAVE_CONFIG_H
#include "config.h"
#endif

#include <xf86drm.h>
#include <util/u_atomic.h>
#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <assert.h>
#include <pthread.h>
#include <sys/ioctl.h>
#include <sys/stat.h>
#include <sys/types.h>
#include <stdbool.h>

#include "errno.h"
#ifndef ETIME
#define ETIME ETIMEDOUT
#endif
#include "common/gen_debug.h"
#include "common/gen_device_info.h"
#include "libdrm_macros.h"
#include "main/macros.h"
#include "util/macros.h"
#include "util/hash_table.h"
#include "util/list.h"
#include "brw_bufmgr.h"
#include "string.h"

#include "i915_drm.h"

#ifdef HAVE_VALGRIND
#include <valgrind.h>
#include <memcheck.h>
#define VG(x) x
#else
#define VG(x)
#endif

#define memclear(s) memset(&s, 0, sizeof(s))

#define FILE_DEBUG_FLAG DEBUG_BUFMGR

static inline int
atomic_add_unless(int *v, int add, int unless)
{
   int c, old;
   c = p_atomic_read(v);
   while (c != unless && (old = p_atomic_cmpxchg(v, c, c + add)) != c)
      c = old;
   return c == unless;
}

struct _drm_bacon_context {
	unsigned int ctx_id;
	struct _drm_bacon_bufmgr *bufmgr;
};

struct drm_bacon_gem_bo_bucket {
	struct list_head head;
	unsigned long size;
};

typedef struct _drm_bacon_bufmgr {
	int fd;

	pthread_mutex_t lock;

	/** Array of lists of cached gem objects of power-of-two sizes */
	struct drm_bacon_gem_bo_bucket cache_bucket[14 * 4];
	int num_buckets;
	time_t time;

	struct hash_table *name_table;
	struct hash_table *handle_table;

	struct list_head vma_cache;
	int vma_count, vma_open, vma_max;

	unsigned int has_llc : 1;
	unsigned int bo_reuse : 1;
} drm_bacon_bufmgr;

static int
drm_bacon_gem_bo_set_tiling_internal(drm_bacon_bo *bo,
				     uint32_t tiling_mode,
				     uint32_t stride);

static void drm_bacon_gem_bo_free(drm_bacon_bo *bo);

static uint32_t
key_hash_uint(const void *key)
{
	return _mesa_hash_data(key, 4);
}

static bool
key_uint_equal(const void *a, const void *b)
{
	return *((unsigned *) a) == *((unsigned *) b);
}

static drm_bacon_bo *
hash_find_bo(struct hash_table *ht, unsigned int key)
{
	struct hash_entry *entry = _mesa_hash_table_search(ht, &key);
	return entry ? (drm_bacon_bo *) entry->data : NULL;
}

static unsigned long
drm_bacon_gem_bo_tile_size(drm_bacon_bufmgr *bufmgr, unsigned long size,
			   uint32_t *tiling_mode)
{
	if (*tiling_mode == I915_TILING_NONE)
		return size;

	/* 965+ just need multiples of page size for tiling */
	return ALIGN(size, 4096);
}

/*
 * Round a given pitch up to the minimum required for X tiling on a
 * given chip.  We use 512 as the minimum to allow for a later tiling
 * change.
 */
static unsigned long
drm_bacon_gem_bo_tile_pitch(drm_bacon_bufmgr *bufmgr,
			    unsigned long pitch, uint32_t *tiling_mode)
{
	unsigned long tile_width;

	/* If untiled, then just align it so that we can do rendering
	 * to it with the 3D engine.
	 */
	if (*tiling_mode == I915_TILING_NONE)
		return ALIGN(pitch, 64);

	if (*tiling_mode == I915_TILING_X)
		tile_width = 512;
	else
		tile_width = 128;

	/* 965 is flexible */
	return ALIGN(pitch, tile_width);
}

static struct drm_bacon_gem_bo_bucket *
drm_bacon_gem_bo_bucket_for_size(drm_bacon_bufmgr *bufmgr,
				 unsigned long size)
{
	int i;

	for (i = 0; i < bufmgr->num_buckets; i++) {
		struct drm_bacon_gem_bo_bucket *bucket =
		    &bufmgr->cache_bucket[i];
		if (bucket->size >= size) {
			return bucket;
		}
	}

	return NULL;
}

inline void
drm_bacon_bo_reference(drm_bacon_bo *bo)
{
	p_atomic_inc(&bo->refcount);
}

int
drm_bacon_bo_busy(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_busy busy;
	int ret;

	memclear(busy);
	busy.handle = bo->gem_handle;

	ret = drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
	if (ret == 0) {
		bo->idle = !busy.busy;
		return busy.busy;
	} else {
		return false;
	}
	return (ret == 0 && busy.busy);
}

static int
drm_bacon_gem_bo_madvise_internal(drm_bacon_bufmgr *bufmgr,
				  drm_bacon_bo *bo, int state)
{
	struct drm_i915_gem_madvise madv;

	memclear(madv);
	madv.handle = bo->gem_handle;
	madv.madv = state;
	madv.retained = 1;
	drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv);

	return madv.retained;
}

int
drm_bacon_bo_madvise(drm_bacon_bo *bo, int madv)
{
	return drm_bacon_gem_bo_madvise_internal(bo->bufmgr, bo, madv);
}

/* drop the oldest entries that have been purged by the kernel */
static void
drm_bacon_gem_bo_cache_purge_bucket(drm_bacon_bufmgr *bufmgr,
				    struct drm_bacon_gem_bo_bucket *bucket)
{
	while (!list_empty(&bucket->head)) {
		drm_bacon_bo *bo;

		bo = LIST_ENTRY(drm_bacon_bo, bucket->head.next, head);
		if (drm_bacon_gem_bo_madvise_internal
		    (bufmgr, bo, I915_MADV_DONTNEED))
			break;

		list_del(&bo->head);
		drm_bacon_gem_bo_free(bo);
	}
}

static drm_bacon_bo *
drm_bacon_gem_bo_alloc_internal(drm_bacon_bufmgr *bufmgr,
				const char *name,
				unsigned long size,
				unsigned long flags,
				uint32_t tiling_mode,
				unsigned long stride,
				unsigned int alignment)
{
	drm_bacon_bo *bo;
	unsigned int page_size = getpagesize();
	int ret;
	struct drm_bacon_gem_bo_bucket *bucket;
	bool alloc_from_cache;
	unsigned long bo_size;
	bool for_render = false;

	if (flags & BO_ALLOC_FOR_RENDER)
		for_render = true;

	/* Round the allocated size up to a power of two number of pages. */
	bucket = drm_bacon_gem_bo_bucket_for_size(bufmgr, size);

	/* If we don't have caching at this size, don't actually round the
	 * allocation up.
	 */
	if (bucket == NULL) {
		bo_size = size;
		if (bo_size < page_size)
			bo_size = page_size;
	} else {
		bo_size = bucket->size;
	}

	pthread_mutex_lock(&bufmgr->lock);
	/* Get a buffer out of the cache if available */
retry:
	alloc_from_cache = false;
	if (bucket != NULL && !list_empty(&bucket->head)) {
		if (for_render) {
			/* Allocate new render-target BOs from the tail (MRU)
			 * of the list, as it will likely be hot in the GPU
			 * cache and in the aperture for us.
			 */
			bo = LIST_ENTRY(drm_bacon_bo, bucket->head.prev, head);
			list_del(&bo->head);
			alloc_from_cache = true;
			bo->align = alignment;
		} else {
			assert(alignment == 0);
			/* For non-render-target BOs (where we're probably
			 * going to map it first thing in order to fill it
			 * with data), check if the last BO in the cache is
			 * unbusy, and only reuse in that case. Otherwise,
			 * allocating a new buffer is probably faster than
			 * waiting for the GPU to finish.
			 */
			bo = LIST_ENTRY(drm_bacon_bo, bucket->head.next, head);
			if (!drm_bacon_bo_busy(bo)) {
				alloc_from_cache = true;
				list_del(&bo->head);
			}
		}

		if (alloc_from_cache) {
			if (!drm_bacon_gem_bo_madvise_internal
			    (bufmgr, bo, I915_MADV_WILLNEED)) {
				drm_bacon_gem_bo_free(bo);
				drm_bacon_gem_bo_cache_purge_bucket(bufmgr,
								    bucket);
				goto retry;
			}

			if (drm_bacon_gem_bo_set_tiling_internal(bo,
								 tiling_mode,
								 stride)) {
				drm_bacon_gem_bo_free(bo);
				goto retry;
			}
		}
	}

	if (!alloc_from_cache) {
		struct drm_i915_gem_create create;

		bo = calloc(1, sizeof(*bo));
		if (!bo)
			goto err;

		/* drm_bacon_gem_bo_free calls list_del() for an uninitialized
		   list (vma_list), so better set the list head here */
		list_inithead(&bo->vma_list);

		bo->size = bo_size;

		memclear(create);
		create.size = bo_size;

		ret = drmIoctl(bufmgr->fd,
			       DRM_IOCTL_I915_GEM_CREATE,
			       &create);
		if (ret != 0) {
			free(bo);
			goto err;
		}

		bo->gem_handle = create.handle;
		_mesa_hash_table_insert(bufmgr->handle_table,
					&bo->gem_handle, bo);

		bo->bufmgr = bufmgr;
		bo->align = alignment;

		bo->tiling_mode = I915_TILING_NONE;
		bo->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
		bo->stride = 0;

		if (drm_bacon_gem_bo_set_tiling_internal(bo,
							 tiling_mode,
							 stride))
			goto err_free;
	}

	bo->name = name;
	p_atomic_set(&bo->refcount, 1);
	bo->reusable = true;

	pthread_mutex_unlock(&bufmgr->lock);

	DBG("bo_create: buf %d (%s) %ldb\n",
	    bo->gem_handle, bo->name, size);

	return bo;

err_free:
	drm_bacon_gem_bo_free(bo);
err:
	pthread_mutex_unlock(&bufmgr->lock);
	return NULL;
}

drm_bacon_bo *
drm_bacon_bo_alloc_for_render(drm_bacon_bufmgr *bufmgr,
			      const char *name,
			      unsigned long size,
			      unsigned int alignment)
{
	return drm_bacon_gem_bo_alloc_internal(bufmgr, name, size,
					       BO_ALLOC_FOR_RENDER,
					       I915_TILING_NONE, 0,
					       alignment);
}

drm_bacon_bo *
drm_bacon_bo_alloc(drm_bacon_bufmgr *bufmgr,
		   const char *name,
		   unsigned long size,
		   unsigned int alignment)
{
	return drm_bacon_gem_bo_alloc_internal(bufmgr, name, size, 0,
					       I915_TILING_NONE, 0, 0);
}

drm_bacon_bo *
drm_bacon_bo_alloc_tiled(drm_bacon_bufmgr *bufmgr, const char *name,
			 int x, int y, int cpp, uint32_t *tiling_mode,
			 unsigned long *pitch, unsigned long flags)
{
	unsigned long size, stride;
	uint32_t tiling;

	do {
		unsigned long aligned_y, height_alignment;

		tiling = *tiling_mode;

		/* If we're tiled, our allocations are in 8 or 32-row blocks,
		 * so failure to align our height means that we won't allocate
		 * enough pages.
		 *
		 * If we're untiled, we still have to align to 2 rows high
		 * because the data port accesses 2x2 blocks even if the
		 * bottom row isn't to be rendered, so failure to align means
		 * we could walk off the end of the GTT and fault.  This is
		 * documented on 965, and may be the case on older chipsets
		 * too so we try to be careful.
		 */
		aligned_y = y;
		height_alignment = 2;

		if (tiling == I915_TILING_X)
			height_alignment = 8;
		else if (tiling == I915_TILING_Y)
			height_alignment = 32;
		aligned_y = ALIGN(y, height_alignment);

		stride = x * cpp;
		stride = drm_bacon_gem_bo_tile_pitch(bufmgr, stride, tiling_mode);
		size = stride * aligned_y;
		size = drm_bacon_gem_bo_tile_size(bufmgr, size, tiling_mode);
	} while (*tiling_mode != tiling);
	*pitch = stride;

	if (tiling == I915_TILING_NONE)
		stride = 0;

	return drm_bacon_gem_bo_alloc_internal(bufmgr, name, size, flags,
					       tiling, stride, 0);
}

/**
 * Returns a drm_bacon_bo wrapping the given buffer object handle.
 *
 * This can be used when one application needs to pass a buffer object
 * to another.
 */
drm_bacon_bo *
drm_bacon_bo_gem_create_from_name(drm_bacon_bufmgr *bufmgr,
				  const char *name,
				  unsigned int handle)
{
	drm_bacon_bo *bo;
	int ret;
	struct drm_gem_open open_arg;
	struct drm_i915_gem_get_tiling get_tiling;

	/* At the moment most applications only have a few named bo.
	 * For instance, in a DRI client only the render buffers passed
	 * between X and the client are named. And since X returns the
	 * alternating names for the front/back buffer a linear search
	 * provides a sufficiently fast match.
	 */
	pthread_mutex_lock(&bufmgr->lock);
	bo = hash_find_bo(bufmgr->name_table, handle);
	if (bo) {
		drm_bacon_bo_reference(bo);
		goto out;
	}

	memclear(open_arg);
	open_arg.name = handle;
	ret = drmIoctl(bufmgr->fd,
		       DRM_IOCTL_GEM_OPEN,
		       &open_arg);
	if (ret != 0) {
		DBG("Couldn't reference %s handle 0x%08x: %s\n",
		    name, handle, strerror(errno));
		bo = NULL;
		goto out;
	}
        /* Now see if someone has used a prime handle to get this
         * object from the kernel before by looking through the list
         * again for a matching gem_handle
         */
	bo = hash_find_bo(bufmgr->handle_table, open_arg.handle);
	if (bo) {
		drm_bacon_bo_reference(bo);
		goto out;
	}

	bo = calloc(1, sizeof(*bo));
	if (!bo)
		goto out;

	p_atomic_set(&bo->refcount, 1);
	list_inithead(&bo->vma_list);

	bo->size = open_arg.size;
	bo->offset64 = 0;
	bo->virtual = NULL;
	bo->bufmgr = bufmgr;
	bo->gem_handle = open_arg.handle;
	bo->name = name;
	bo->global_name = handle;
	bo->reusable = false;

	_mesa_hash_table_insert(bufmgr->handle_table, &bo->gem_handle, bo);
	_mesa_hash_table_insert(bufmgr->name_table, &bo->global_name, bo);

	memclear(get_tiling);
	get_tiling.handle = bo->gem_handle;
	ret = drmIoctl(bufmgr->fd,
		       DRM_IOCTL_I915_GEM_GET_TILING,
		       &get_tiling);
	if (ret != 0)
		goto err_unref;

	bo->tiling_mode = get_tiling.tiling_mode;
	bo->swizzle_mode = get_tiling.swizzle_mode;
	/* XXX stride is unknown */
	DBG("bo_create_from_handle: %d (%s)\n", handle, bo->name);

out:
	pthread_mutex_unlock(&bufmgr->lock);
	return bo;

err_unref:
	drm_bacon_gem_bo_free(bo);
	pthread_mutex_unlock(&bufmgr->lock);
	return NULL;
}

static void
drm_bacon_gem_bo_free(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_gem_close close;
	struct hash_entry *entry;
	int ret;

	list_del(&bo->vma_list);
	if (bo->mem_virtual) {
		VG(VALGRIND_FREELIKE_BLOCK(bo->mem_virtual, 0));
		drm_munmap(bo->mem_virtual, bo->size);
		bufmgr->vma_count--;
	}
	if (bo->wc_virtual) {
		VG(VALGRIND_FREELIKE_BLOCK(bo->wc_virtual, 0));
		drm_munmap(bo->wc_virtual, bo->size);
		bufmgr->vma_count--;
	}
	if (bo->gtt_virtual) {
		drm_munmap(bo->gtt_virtual, bo->size);
		bufmgr->vma_count--;
	}

	if (bo->global_name) {
		entry = _mesa_hash_table_search(bufmgr->name_table,
						&bo->global_name);
		_mesa_hash_table_remove(bufmgr->name_table, entry);
	}
	entry = _mesa_hash_table_search(bufmgr->handle_table,
					&bo->gem_handle);
	_mesa_hash_table_remove(bufmgr->handle_table, entry);

	/* Close this object */
	memclear(close);
	close.handle = bo->gem_handle;
	ret = drmIoctl(bufmgr->fd, DRM_IOCTL_GEM_CLOSE, &close);
	if (ret != 0) {
		DBG("DRM_IOCTL_GEM_CLOSE %d failed (%s): %s\n",
		    bo->gem_handle, bo->name, strerror(errno));
	}
	free(bo);
}

static void
drm_bacon_gem_bo_mark_mmaps_incoherent(drm_bacon_bo *bo)
{
#if HAVE_VALGRIND
	if (bo->mem_virtual)
		VALGRIND_MAKE_MEM_NOACCESS(bo->mem_virtual, bo->size);

	if (bo->wc_virtual)
		VALGRIND_MAKE_MEM_NOACCESS(bo->wc_virtual, bo->size);

	if (bo->gtt_virtual)
		VALGRIND_MAKE_MEM_NOACCESS(bo->gtt_virtual, bo->size);
#endif
}

/** Frees all cached buffers significantly older than @time. */
static void
drm_bacon_gem_cleanup_bo_cache(drm_bacon_bufmgr *bufmgr, time_t time)
{
	int i;

	if (bufmgr->time == time)
		return;

	for (i = 0; i < bufmgr->num_buckets; i++) {
		struct drm_bacon_gem_bo_bucket *bucket =
		    &bufmgr->cache_bucket[i];

		while (!list_empty(&bucket->head)) {
			drm_bacon_bo *bo;

			bo = LIST_ENTRY(drm_bacon_bo, bucket->head.next, head);
			if (time - bo->free_time <= 1)
				break;

			list_del(&bo->head);

			drm_bacon_gem_bo_free(bo);
		}
	}

	bufmgr->time = time;
}

static void drm_bacon_gem_bo_purge_vma_cache(drm_bacon_bufmgr *bufmgr)
{
	int limit;

	DBG("%s: cached=%d, open=%d, limit=%d\n", __FUNCTION__,
	    bufmgr->vma_count, bufmgr->vma_open, bufmgr->vma_max);

	if (bufmgr->vma_max < 0)
		return;

	/* We may need to evict a few entries in order to create new mmaps */
	limit = bufmgr->vma_max - 2*bufmgr->vma_open;
	if (limit < 0)
		limit = 0;

	while (bufmgr->vma_count > limit) {
		drm_bacon_bo *bo;

		bo = LIST_ENTRY(drm_bacon_bo, bufmgr->vma_cache.next, vma_list);
		assert(bo->map_count == 0);
		list_delinit(&bo->vma_list);

		if (bo->mem_virtual) {
			drm_munmap(bo->mem_virtual, bo->size);
			bo->mem_virtual = NULL;
			bufmgr->vma_count--;
		}
		if (bo->wc_virtual) {
			drm_munmap(bo->wc_virtual, bo->size);
			bo->wc_virtual = NULL;
			bufmgr->vma_count--;
		}
		if (bo->gtt_virtual) {
			drm_munmap(bo->gtt_virtual, bo->size);
			bo->gtt_virtual = NULL;
			bufmgr->vma_count--;
		}
	}
}

static void drm_bacon_gem_bo_close_vma(drm_bacon_bufmgr *bufmgr,
				       drm_bacon_bo *bo)
{
	bufmgr->vma_open--;
	list_addtail(&bo->vma_list, &bufmgr->vma_cache);
	if (bo->mem_virtual)
		bufmgr->vma_count++;
	if (bo->wc_virtual)
		bufmgr->vma_count++;
	if (bo->gtt_virtual)
		bufmgr->vma_count++;
	drm_bacon_gem_bo_purge_vma_cache(bufmgr);
}

static void drm_bacon_gem_bo_open_vma(drm_bacon_bufmgr *bufmgr,
				      drm_bacon_bo *bo)
{
	bufmgr->vma_open++;
	list_del(&bo->vma_list);
	if (bo->mem_virtual)
		bufmgr->vma_count--;
	if (bo->wc_virtual)
		bufmgr->vma_count--;
	if (bo->gtt_virtual)
		bufmgr->vma_count--;
	drm_bacon_gem_bo_purge_vma_cache(bufmgr);
}

static void
drm_bacon_gem_bo_unreference_final(drm_bacon_bo *bo, time_t time)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_bacon_gem_bo_bucket *bucket;

	DBG("bo_unreference final: %d (%s)\n",
	    bo->gem_handle, bo->name);

	/* Clear any left-over mappings */
	if (bo->map_count) {
		DBG("bo freed with non-zero map-count %d\n", bo->map_count);
		bo->map_count = 0;
		drm_bacon_gem_bo_close_vma(bufmgr, bo);
		drm_bacon_gem_bo_mark_mmaps_incoherent(bo);
	}

	bucket = drm_bacon_gem_bo_bucket_for_size(bufmgr, bo->size);
	/* Put the buffer into our internal cache for reuse if we can. */
	if (bufmgr->bo_reuse && bo->reusable && bucket != NULL &&
	    drm_bacon_gem_bo_madvise_internal(bufmgr, bo,
					      I915_MADV_DONTNEED)) {
		bo->free_time = time;

		bo->name = NULL;

		list_addtail(&bo->head, &bucket->head);
	} else {
		drm_bacon_gem_bo_free(bo);
	}
}

void
drm_bacon_bo_unreference(drm_bacon_bo *bo)
{
	if (bo == NULL)
		return;

	assert(p_atomic_read(&bo->refcount) > 0);

	if (atomic_add_unless(&bo->refcount, -1, 1)) {
		drm_bacon_bufmgr *bufmgr = bo->bufmgr;
		struct timespec time;

		clock_gettime(CLOCK_MONOTONIC, &time);

		pthread_mutex_lock(&bufmgr->lock);

		if (p_atomic_dec_zero(&bo->refcount)) {
			drm_bacon_gem_bo_unreference_final(bo, time.tv_sec);
			drm_bacon_gem_cleanup_bo_cache(bufmgr, time.tv_sec);
		}

		pthread_mutex_unlock(&bufmgr->lock);
	}
}

int
drm_bacon_bo_map(drm_bacon_bo *bo, int write_enable)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_set_domain set_domain;
	int ret;

	pthread_mutex_lock(&bufmgr->lock);

	if (bo->map_count++ == 0)
		drm_bacon_gem_bo_open_vma(bufmgr, bo);

	if (!bo->mem_virtual) {
		struct drm_i915_gem_mmap mmap_arg;

		DBG("bo_map: %d (%s), map_count=%d\n",
		    bo->gem_handle, bo->name, bo->map_count);

		memclear(mmap_arg);
		mmap_arg.handle = bo->gem_handle;
		mmap_arg.size = bo->size;
		ret = drmIoctl(bufmgr->fd,
			       DRM_IOCTL_I915_GEM_MMAP,
			       &mmap_arg);
		if (ret != 0) {
			ret = -errno;
			DBG("%s:%d: Error mapping buffer %d (%s): %s .\n",
			    __FILE__, __LINE__, bo->gem_handle,
			    bo->name, strerror(errno));
			if (--bo->map_count == 0)
				drm_bacon_gem_bo_close_vma(bufmgr, bo);
			pthread_mutex_unlock(&bufmgr->lock);
			return ret;
		}
		VG(VALGRIND_MALLOCLIKE_BLOCK(mmap_arg.addr_ptr, mmap_arg.size, 0, 1));
		bo->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr;
	}
	DBG("bo_map: %d (%s) -> %p\n", bo->gem_handle, bo->name,
	    bo->mem_virtual);
	bo->virtual = bo->mem_virtual;

	memclear(set_domain);
	set_domain.handle = bo->gem_handle;
	set_domain.read_domains = I915_GEM_DOMAIN_CPU;
	if (write_enable)
		set_domain.write_domain = I915_GEM_DOMAIN_CPU;
	else
		set_domain.write_domain = 0;
	ret = drmIoctl(bufmgr->fd,
		       DRM_IOCTL_I915_GEM_SET_DOMAIN,
		       &set_domain);
	if (ret != 0) {
		DBG("%s:%d: Error setting to CPU domain %d: %s\n",
		    __FILE__, __LINE__, bo->gem_handle,
		    strerror(errno));
	}

	drm_bacon_gem_bo_mark_mmaps_incoherent(bo);
	VG(VALGRIND_MAKE_MEM_DEFINED(bo->mem_virtual, bo->size));
	pthread_mutex_unlock(&bufmgr->lock);

	return 0;
}

static int
map_gtt(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	int ret;

	if (bo->map_count++ == 0)
		drm_bacon_gem_bo_open_vma(bufmgr, bo);

	/* Get a mapping of the buffer if we haven't before. */
	if (bo->gtt_virtual == NULL) {
		struct drm_i915_gem_mmap_gtt mmap_arg;

		DBG("bo_map_gtt: mmap %d (%s), map_count=%d\n",
		    bo->gem_handle, bo->name, bo->map_count);

		memclear(mmap_arg);
		mmap_arg.handle = bo->gem_handle;

		/* Get the fake offset back... */
		ret = drmIoctl(bufmgr->fd,
			       DRM_IOCTL_I915_GEM_MMAP_GTT,
			       &mmap_arg);
		if (ret != 0) {
			ret = -errno;
			DBG("%s:%d: Error preparing buffer map %d (%s): %s .\n",
			    __FILE__, __LINE__,
			    bo->gem_handle, bo->name,
			    strerror(errno));
			if (--bo->map_count == 0)
				drm_bacon_gem_bo_close_vma(bufmgr, bo);
			return ret;
		}

		/* and mmap it */
		bo->gtt_virtual = drm_mmap(0, bo->size, PROT_READ | PROT_WRITE,
					       MAP_SHARED, bufmgr->fd,
					       mmap_arg.offset);
		if (bo->gtt_virtual == MAP_FAILED) {
			bo->gtt_virtual = NULL;
			ret = -errno;
			DBG("%s:%d: Error mapping buffer %d (%s): %s .\n",
			    __FILE__, __LINE__,
			    bo->gem_handle, bo->name,
			    strerror(errno));
			if (--bo->map_count == 0)
				drm_bacon_gem_bo_close_vma(bufmgr, bo);
			return ret;
		}
	}

	bo->virtual = bo->gtt_virtual;

	DBG("bo_map_gtt: %d (%s) -> %p\n", bo->gem_handle, bo->name,
	    bo->gtt_virtual);

	return 0;
}

int
drm_bacon_gem_bo_map_gtt(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_set_domain set_domain;
	int ret;

	pthread_mutex_lock(&bufmgr->lock);

	ret = map_gtt(bo);
	if (ret) {
		pthread_mutex_unlock(&bufmgr->lock);
		return ret;
	}

	/* Now move it to the GTT domain so that the GPU and CPU
	 * caches are flushed and the GPU isn't actively using the
	 * buffer.
	 *
	 * The pagefault handler does this domain change for us when
	 * it has unbound the BO from the GTT, but it's up to us to
	 * tell it when we're about to use things if we had done
	 * rendering and it still happens to be bound to the GTT.
	 */
	memclear(set_domain);
	set_domain.handle = bo->gem_handle;
	set_domain.read_domains = I915_GEM_DOMAIN_GTT;
	set_domain.write_domain = I915_GEM_DOMAIN_GTT;
	ret = drmIoctl(bufmgr->fd,
		       DRM_IOCTL_I915_GEM_SET_DOMAIN,
		       &set_domain);
	if (ret != 0) {
		DBG("%s:%d: Error setting domain %d: %s\n",
		    __FILE__, __LINE__, bo->gem_handle,
		    strerror(errno));
	}

	drm_bacon_gem_bo_mark_mmaps_incoherent(bo);
	VG(VALGRIND_MAKE_MEM_DEFINED(bo->gtt_virtual, bo->size));
	pthread_mutex_unlock(&bufmgr->lock);

	return 0;
}

/**
 * Performs a mapping of the buffer object like the normal GTT
 * mapping, but avoids waiting for the GPU to be done reading from or
 * rendering to the buffer.
 *
 * This is used in the implementation of GL_ARB_map_buffer_range: The
 * user asks to create a buffer, then does a mapping, fills some
 * space, runs a drawing command, then asks to map it again without
 * synchronizing because it guarantees that it won't write over the
 * data that the GPU is busy using (or, more specifically, that if it
 * does write over the data, it acknowledges that rendering is
 * undefined).
 */

int
drm_bacon_gem_bo_map_unsynchronized(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	int ret;

	/* If the CPU cache isn't coherent with the GTT, then use a
	 * regular synchronized mapping.  The problem is that we don't
	 * track where the buffer was last used on the CPU side in
	 * terms of drm_bacon_bo_map vs drm_bacon_gem_bo_map_gtt, so
	 * we would potentially corrupt the buffer even when the user
	 * does reasonable things.
	 */
	if (!bufmgr->has_llc)
		return drm_bacon_gem_bo_map_gtt(bo);

	pthread_mutex_lock(&bufmgr->lock);

	ret = map_gtt(bo);
	if (ret == 0) {
		drm_bacon_gem_bo_mark_mmaps_incoherent(bo);
		VG(VALGRIND_MAKE_MEM_DEFINED(bo->gtt_virtual, bo->size));
	}

	pthread_mutex_unlock(&bufmgr->lock);

	return ret;
}

int
drm_bacon_bo_unmap(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	int ret = 0;

	if (bo == NULL)
		return 0;

	pthread_mutex_lock(&bufmgr->lock);

	if (bo->map_count <= 0) {
		DBG("attempted to unmap an unmapped bo\n");
		pthread_mutex_unlock(&bufmgr->lock);
		/* Preserve the old behaviour of just treating this as a
		 * no-op rather than reporting the error.
		 */
		return 0;
	}

	/* We need to unmap after every innovation as we cannot track
	 * an open vma for every bo as that will exhaust the system
	 * limits and cause later failures.
	 */
	if (--bo->map_count == 0) {
		drm_bacon_gem_bo_close_vma(bufmgr, bo);
		drm_bacon_gem_bo_mark_mmaps_incoherent(bo);
		bo->virtual = NULL;
	}
	pthread_mutex_unlock(&bufmgr->lock);

	return ret;
}

int
drm_bacon_bo_subdata(drm_bacon_bo *bo, unsigned long offset,
		     unsigned long size, const void *data)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_pwrite pwrite;
	int ret;

	memclear(pwrite);
	pwrite.handle = bo->gem_handle;
	pwrite.offset = offset;
	pwrite.size = size;
	pwrite.data_ptr = (uint64_t) (uintptr_t) data;
	ret = drmIoctl(bufmgr->fd,
		       DRM_IOCTL_I915_GEM_PWRITE,
		       &pwrite);
	if (ret != 0) {
		ret = -errno;
		DBG("%s:%d: Error writing data to buffer %d: (%d %d) %s .\n",
		    __FILE__, __LINE__, bo->gem_handle, (int)offset,
		    (int)size, strerror(errno));
	}

	return ret;
}

int
drm_bacon_bo_get_subdata(drm_bacon_bo *bo, unsigned long offset,
			 unsigned long size, void *data)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_pread pread;
	int ret;

	memclear(pread);
	pread.handle = bo->gem_handle;
	pread.offset = offset;
	pread.size = size;
	pread.data_ptr = (uint64_t) (uintptr_t) data;
	ret = drmIoctl(bufmgr->fd,
		       DRM_IOCTL_I915_GEM_PREAD,
		       &pread);
	if (ret != 0) {
		ret = -errno;
		DBG("%s:%d: Error reading data from buffer %d: (%d %d) %s .\n",
		    __FILE__, __LINE__, bo->gem_handle, (int)offset,
		    (int)size, strerror(errno));
	}

	return ret;
}

/** Waits for all GPU rendering with the object to have completed. */
void
drm_bacon_bo_wait_rendering(drm_bacon_bo *bo)
{
	drm_bacon_gem_bo_start_gtt_access(bo, 1);
}

/**
 * Waits on a BO for the given amount of time.
 *
 * @bo: buffer object to wait for
 * @timeout_ns: amount of time to wait in nanoseconds.
 *   If value is less than 0, an infinite wait will occur.
 *
 * Returns 0 if the wait was successful ie. the last batch referencing the
 * object has completed within the allotted time. Otherwise some negative return
 * value describes the error. Of particular interest is -ETIME when the wait has
 * failed to yield the desired result.
 *
 * Similar to drm_bacon_gem_bo_wait_rendering except a timeout parameter allows
 * the operation to give up after a certain amount of time. Another subtle
 * difference is the internal locking semantics are different (this variant does
 * not hold the lock for the duration of the wait). This makes the wait subject
 * to a larger userspace race window.
 *
 * The implementation shall wait until the object is no longer actively
 * referenced within a batch buffer at the time of the call. The wait will
 * not guarantee that the buffer is re-issued via another thread, or an flinked
 * handle. Userspace must make sure this race does not occur if such precision
 * is important.
 *
 * Note that some kernels have broken the inifite wait for negative values
 * promise, upgrade to latest stable kernels if this is the case.
 */
int
drm_bacon_gem_bo_wait(drm_bacon_bo *bo, int64_t timeout_ns)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_wait wait;
	int ret;

	memclear(wait);
	wait.bo_handle = bo->gem_handle;
	wait.timeout_ns = timeout_ns;
	ret = drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_WAIT, &wait);
	if (ret == -1)
		return -errno;

	return ret;
}

/**
 * Sets the object to the GTT read and possibly write domain, used by the X
 * 2D driver in the absence of kernel support to do drm_bacon_gem_bo_map_gtt().
 *
 * In combination with drm_bacon_gem_bo_pin() and manual fence management, we
 * can do tiled pixmaps this way.
 */
void
drm_bacon_gem_bo_start_gtt_access(drm_bacon_bo *bo, int write_enable)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_set_domain set_domain;
	int ret;

	memclear(set_domain);
	set_domain.handle = bo->gem_handle;
	set_domain.read_domains = I915_GEM_DOMAIN_GTT;
	set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0;
	ret = drmIoctl(bufmgr->fd,
		       DRM_IOCTL_I915_GEM_SET_DOMAIN,
		       &set_domain);
	if (ret != 0) {
		DBG("%s:%d: Error setting memory domains %d (%08x %08x): %s .\n",
		    __FILE__, __LINE__, bo->gem_handle,
		    set_domain.read_domains, set_domain.write_domain,
		    strerror(errno));
	}
}

void
drm_bacon_bufmgr_destroy(drm_bacon_bufmgr *bufmgr)
{
	pthread_mutex_destroy(&bufmgr->lock);

	/* Free any cached buffer objects we were going to reuse */
	for (int i = 0; i < bufmgr->num_buckets; i++) {
		struct drm_bacon_gem_bo_bucket *bucket =
		    &bufmgr->cache_bucket[i];
		drm_bacon_bo *bo;

		while (!list_empty(&bucket->head)) {
			bo = LIST_ENTRY(drm_bacon_bo, bucket->head.next, head);
			list_del(&bo->head);

			drm_bacon_gem_bo_free(bo);
		}
	}

	_mesa_hash_table_destroy(bufmgr->name_table, NULL);
	_mesa_hash_table_destroy(bufmgr->handle_table, NULL);

	free(bufmgr);
}

static int
drm_bacon_gem_bo_set_tiling_internal(drm_bacon_bo *bo,
				     uint32_t tiling_mode,
				     uint32_t stride)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;
	struct drm_i915_gem_set_tiling set_tiling;
	int ret;

	if (bo->global_name == 0 &&
	    tiling_mode == bo->tiling_mode &&
	    stride == bo->stride)
		return 0;

	memset(&set_tiling, 0, sizeof(set_tiling));
	do {
		/* set_tiling is slightly broken and overwrites the
		 * input on the error path, so we have to open code
		 * rmIoctl.
		 */
		set_tiling.handle = bo->gem_handle;
		set_tiling.tiling_mode = tiling_mode;
		set_tiling.stride = stride;

		ret = ioctl(bufmgr->fd,
			    DRM_IOCTL_I915_GEM_SET_TILING,
			    &set_tiling);
	} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
	if (ret == -1)
		return -errno;

	bo->tiling_mode = set_tiling.tiling_mode;
	bo->swizzle_mode = set_tiling.swizzle_mode;
	bo->stride = set_tiling.stride;
	return 0;
}

int
drm_bacon_bo_set_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
			uint32_t stride)
{
	int ret;

	/* Linear buffers have no stride. By ensuring that we only ever use
	 * stride 0 with linear buffers, we simplify our code.
	 */
	if (*tiling_mode == I915_TILING_NONE)
		stride = 0;

	ret = drm_bacon_gem_bo_set_tiling_internal(bo, *tiling_mode, stride);

	*tiling_mode = bo->tiling_mode;
	return ret;
}

int
drm_bacon_bo_get_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
			uint32_t *swizzle_mode)
{
	*tiling_mode = bo->tiling_mode;
	*swizzle_mode = bo->swizzle_mode;
	return 0;
}

drm_bacon_bo *
drm_bacon_bo_gem_create_from_prime(drm_bacon_bufmgr *bufmgr, int prime_fd, int size)
{
	int ret;
	uint32_t handle;
	drm_bacon_bo *bo;
	struct drm_i915_gem_get_tiling get_tiling;

	pthread_mutex_lock(&bufmgr->lock);
	ret = drmPrimeFDToHandle(bufmgr->fd, prime_fd, &handle);
	if (ret) {
		DBG("create_from_prime: failed to obtain handle from fd: %s\n", strerror(errno));
		pthread_mutex_unlock(&bufmgr->lock);
		return NULL;
	}

	/*
	 * See if the kernel has already returned this buffer to us. Just as
	 * for named buffers, we must not create two bo's pointing at the same
	 * kernel object
	 */
	bo = hash_find_bo(bufmgr->handle_table, handle);
	if (bo) {
		drm_bacon_bo_reference(bo);
		goto out;
	}

	bo = calloc(1, sizeof(*bo));
	if (!bo)
		goto out;

	p_atomic_set(&bo->refcount, 1);
	list_inithead(&bo->vma_list);

	/* Determine size of bo.  The fd-to-handle ioctl really should
	 * return the size, but it doesn't.  If we have kernel 3.12 or
	 * later, we can lseek on the prime fd to get the size.  Older
	 * kernels will just fail, in which case we fall back to the
	 * provided (estimated or guess size). */
	ret = lseek(prime_fd, 0, SEEK_END);
	if (ret != -1)
		bo->size = ret;
	else
		bo->size = size;

	bo->bufmgr = bufmgr;

	bo->gem_handle = handle;
	_mesa_hash_table_insert(bufmgr->handle_table,
				&bo->gem_handle, bo);

	bo->name = "prime";
	bo->reusable = false;

	memclear(get_tiling);
	get_tiling.handle = bo->gem_handle;
	if (drmIoctl(bufmgr->fd,
		     DRM_IOCTL_I915_GEM_GET_TILING,
		     &get_tiling))
		goto err;

	bo->tiling_mode = get_tiling.tiling_mode;
	bo->swizzle_mode = get_tiling.swizzle_mode;
	/* XXX stride is unknown */

out:
	pthread_mutex_unlock(&bufmgr->lock);
	return bo;

err:
	drm_bacon_gem_bo_free(bo);
	pthread_mutex_unlock(&bufmgr->lock);
	return NULL;
}

int
drm_bacon_bo_gem_export_to_prime(drm_bacon_bo *bo, int *prime_fd)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;

	if (drmPrimeHandleToFD(bufmgr->fd, bo->gem_handle,
			       DRM_CLOEXEC, prime_fd) != 0)
		return -errno;

	bo->reusable = false;

	return 0;
}

int
drm_bacon_bo_flink(drm_bacon_bo *bo, uint32_t *name)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;

	if (!bo->global_name) {
		struct drm_gem_flink flink;

		memclear(flink);
		flink.handle = bo->gem_handle;
		if (drmIoctl(bufmgr->fd, DRM_IOCTL_GEM_FLINK, &flink))
			return -errno;

		pthread_mutex_lock(&bufmgr->lock);
		if (!bo->global_name) {
			bo->global_name = flink.name;
			bo->reusable = false;

			_mesa_hash_table_insert(bufmgr->name_table,
						&bo->global_name, bo);
		}
		pthread_mutex_unlock(&bufmgr->lock);
	}

	*name = bo->global_name;
	return 0;
}

/**
 * Enables unlimited caching of buffer objects for reuse.
 *
 * This is potentially very memory expensive, as the cache at each bucket
 * size is only bounded by how many buffers of that size we've managed to have
 * in flight at once.
 */
void
drm_bacon_bufmgr_gem_enable_reuse(drm_bacon_bufmgr *bufmgr)
{
	bufmgr->bo_reuse = true;
}

/*
 * Disable buffer reuse for objects which are shared with the kernel
 * as scanout buffers
 */
int
drm_bacon_bo_disable_reuse(drm_bacon_bo *bo)
{
	bo->reusable = false;
	return 0;
}

int
drm_bacon_bo_is_reusable(drm_bacon_bo *bo)
{
	return bo->reusable;
}

static void
add_bucket(drm_bacon_bufmgr *bufmgr, int size)
{
	unsigned int i = bufmgr->num_buckets;

	assert(i < ARRAY_SIZE(bufmgr->cache_bucket));

	list_inithead(&bufmgr->cache_bucket[i].head);
	bufmgr->cache_bucket[i].size = size;
	bufmgr->num_buckets++;
}

static void
init_cache_buckets(drm_bacon_bufmgr *bufmgr)
{
	unsigned long size, cache_max_size = 64 * 1024 * 1024;

	/* OK, so power of two buckets was too wasteful of memory.
	 * Give 3 other sizes between each power of two, to hopefully
	 * cover things accurately enough.  (The alternative is
	 * probably to just go for exact matching of sizes, and assume
	 * that for things like composited window resize the tiled
	 * width/height alignment and rounding of sizes to pages will
	 * get us useful cache hit rates anyway)
	 */
	add_bucket(bufmgr, 4096);
	add_bucket(bufmgr, 4096 * 2);
	add_bucket(bufmgr, 4096 * 3);

	/* Initialize the linked lists for BO reuse cache. */
	for (size = 4 * 4096; size <= cache_max_size; size *= 2) {
		add_bucket(bufmgr, size);

		add_bucket(bufmgr, size + size * 1 / 4);
		add_bucket(bufmgr, size + size * 2 / 4);
		add_bucket(bufmgr, size + size * 3 / 4);
	}
}

void
drm_bacon_bufmgr_gem_set_vma_cache_size(drm_bacon_bufmgr *bufmgr, int limit)
{
	bufmgr->vma_max = limit;

	drm_bacon_gem_bo_purge_vma_cache(bufmgr);
}

drm_bacon_context *
drm_bacon_gem_context_create(drm_bacon_bufmgr *bufmgr)
{
	struct drm_i915_gem_context_create create;
	drm_bacon_context *context = NULL;
	int ret;

	context = calloc(1, sizeof(*context));
	if (!context)
		return NULL;

	memclear(create);
	ret = drmIoctl(bufmgr->fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create);
	if (ret != 0) {
		DBG("DRM_IOCTL_I915_GEM_CONTEXT_CREATE failed: %s\n",
		    strerror(errno));
		free(context);
		return NULL;
	}

	context->ctx_id = create.ctx_id;
	context->bufmgr = bufmgr;

	return context;
}

int
drm_bacon_gem_context_get_id(drm_bacon_context *ctx, uint32_t *ctx_id)
{
	if (ctx == NULL)
		return -EINVAL;

	*ctx_id = ctx->ctx_id;

	return 0;
}

void
drm_bacon_gem_context_destroy(drm_bacon_context *ctx)
{
	struct drm_i915_gem_context_destroy destroy;
	int ret;

	if (ctx == NULL)
		return;

	memclear(destroy);

	destroy.ctx_id = ctx->ctx_id;
	ret = drmIoctl(ctx->bufmgr->fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY,
		       &destroy);
	if (ret != 0)
		fprintf(stderr, "DRM_IOCTL_I915_GEM_CONTEXT_DESTROY failed: %s\n",
			strerror(errno));

	free(ctx);
}

int
drm_bacon_get_reset_stats(drm_bacon_context *ctx,
			  uint32_t *reset_count,
			  uint32_t *active,
			  uint32_t *pending)
{
	struct drm_i915_reset_stats stats;
	int ret;

	if (ctx == NULL)
		return -EINVAL;

	memclear(stats);

	stats.ctx_id = ctx->ctx_id;
	ret = drmIoctl(ctx->bufmgr->fd,
		       DRM_IOCTL_I915_GET_RESET_STATS,
		       &stats);
	if (ret == 0) {
		if (reset_count != NULL)
			*reset_count = stats.reset_count;

		if (active != NULL)
			*active = stats.batch_active;

		if (pending != NULL)
			*pending = stats.batch_pending;
	}

	return ret;
}

int
drm_bacon_reg_read(drm_bacon_bufmgr *bufmgr,
		   uint32_t offset,
		   uint64_t *result)
{
	struct drm_i915_reg_read reg_read;
	int ret;

	memclear(reg_read);
	reg_read.offset = offset;

	ret = drmIoctl(bufmgr->fd, DRM_IOCTL_I915_REG_READ, &reg_read);

	*result = reg_read.val;
	return ret;
}

void *drm_bacon_gem_bo_map__gtt(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;

	if (bo->gtt_virtual)
		return bo->gtt_virtual;

	pthread_mutex_lock(&bufmgr->lock);
	if (bo->gtt_virtual == NULL) {
		struct drm_i915_gem_mmap_gtt mmap_arg;
		void *ptr;

		DBG("bo_map_gtt: mmap %d (%s), map_count=%d\n",
		    bo->gem_handle, bo->name, bo->map_count);

		if (bo->map_count++ == 0)
			drm_bacon_gem_bo_open_vma(bufmgr, bo);

		memclear(mmap_arg);
		mmap_arg.handle = bo->gem_handle;

		/* Get the fake offset back... */
		ptr = MAP_FAILED;
		if (drmIoctl(bufmgr->fd,
			     DRM_IOCTL_I915_GEM_MMAP_GTT,
			     &mmap_arg) == 0) {
			/* and mmap it */
			ptr = drm_mmap(0, bo->size, PROT_READ | PROT_WRITE,
				       MAP_SHARED, bufmgr->fd,
				       mmap_arg.offset);
		}
		if (ptr == MAP_FAILED) {
			if (--bo->map_count == 0)
				drm_bacon_gem_bo_close_vma(bufmgr, bo);
			ptr = NULL;
		}

		bo->gtt_virtual = ptr;
	}
	pthread_mutex_unlock(&bufmgr->lock);

	return bo->gtt_virtual;
}

void *drm_bacon_gem_bo_map__cpu(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;

	if (bo->mem_virtual)
		return bo->mem_virtual;

	pthread_mutex_lock(&bufmgr->lock);
	if (!bo->mem_virtual) {
		struct drm_i915_gem_mmap mmap_arg;

		if (bo->map_count++ == 0)
			drm_bacon_gem_bo_open_vma(bufmgr, bo);

		DBG("bo_map: %d (%s), map_count=%d\n",
		    bo->gem_handle, bo->name, bo->map_count);

		memclear(mmap_arg);
		mmap_arg.handle = bo->gem_handle;
		mmap_arg.size = bo->size;
		if (drmIoctl(bufmgr->fd,
			     DRM_IOCTL_I915_GEM_MMAP,
			     &mmap_arg)) {
			DBG("%s:%d: Error mapping buffer %d (%s): %s .\n",
			    __FILE__, __LINE__, bo->gem_handle,
			    bo->name, strerror(errno));
			if (--bo->map_count == 0)
				drm_bacon_gem_bo_close_vma(bufmgr, bo);
		} else {
			VG(VALGRIND_MALLOCLIKE_BLOCK(mmap_arg.addr_ptr, mmap_arg.size, 0, 1));
			bo->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr;
		}
	}
	pthread_mutex_unlock(&bufmgr->lock);

	return bo->mem_virtual;
}

void *drm_bacon_gem_bo_map__wc(drm_bacon_bo *bo)
{
	drm_bacon_bufmgr *bufmgr = bo->bufmgr;

	if (bo->wc_virtual)
		return bo->wc_virtual;

	pthread_mutex_lock(&bufmgr->lock);
	if (!bo->wc_virtual) {
		struct drm_i915_gem_mmap mmap_arg;

		if (bo->map_count++ == 0)
			drm_bacon_gem_bo_open_vma(bufmgr, bo);

		DBG("bo_map: %d (%s), map_count=%d\n",
		    bo->gem_handle, bo->name, bo->map_count);

		memclear(mmap_arg);
		mmap_arg.handle = bo->gem_handle;
		mmap_arg.size = bo->size;
		mmap_arg.flags = I915_MMAP_WC;
		if (drmIoctl(bufmgr->fd,
			     DRM_IOCTL_I915_GEM_MMAP,
			     &mmap_arg)) {
			DBG("%s:%d: Error mapping buffer %d (%s): %s .\n",
			    __FILE__, __LINE__, bo->gem_handle,
			    bo->name, strerror(errno));
			if (--bo->map_count == 0)
				drm_bacon_gem_bo_close_vma(bufmgr, bo);
		} else {
			VG(VALGRIND_MALLOCLIKE_BLOCK(mmap_arg.addr_ptr, mmap_arg.size, 0, 1));
			bo->wc_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr;
		}
	}
	pthread_mutex_unlock(&bufmgr->lock);

	return bo->wc_virtual;
}

/**
 * Initializes the GEM buffer manager, which uses the kernel to allocate, map,
 * and manage map buffer objections.
 *
 * \param fd File descriptor of the opened DRM device.
 */
drm_bacon_bufmgr *
drm_bacon_bufmgr_gem_init(struct gen_device_info *devinfo,
                          int fd, int batch_size)
{
	drm_bacon_bufmgr *bufmgr;

	bufmgr = calloc(1, sizeof(*bufmgr));
	if (bufmgr == NULL)
		return NULL;

	/* Handles to buffer objects belong to the device fd and are not
	 * reference counted by the kernel.  If the same fd is used by
	 * multiple parties (threads sharing the same screen bufmgr, or
	 * even worse the same device fd passed to multiple libraries)
	 * ownership of those handles is shared by those independent parties.
	 *
	 * Don't do this! Ensure that each library/bufmgr has its own device
	 * fd so that its namespace does not clash with another.
	 */
	bufmgr->fd = fd;

	if (pthread_mutex_init(&bufmgr->lock, NULL) != 0) {
		free(bufmgr);
		return NULL;
	}

	bufmgr->has_llc = devinfo->has_llc;

	init_cache_buckets(bufmgr);

	list_inithead(&bufmgr->vma_cache);
	bufmgr->vma_max = -1; /* unlimited by default */

	bufmgr->name_table =
		_mesa_hash_table_create(NULL, key_hash_uint, key_uint_equal);
	bufmgr->handle_table =
		_mesa_hash_table_create(NULL, key_hash_uint, key_uint_equal);

	return bufmgr;
}