index
:
mesa/mesa
10.0
10.1
10.2
10.3
10.4
10.5
10.6
11.0
11.1
11.2
12.0
13.0
17.0
17.1
17.2
17.3
18.0
18.1
18.2
18.3
19.0
19.1
19.2
19.3
20.0
20.1
20.2
20.3
21.0
21.1
21.2
21.3
22.0
22.1
22.2
22.3
23.0
23.1
23.2
23.3
24.0
24.1
7.10
7.11
7.8
7.8-gles
7.9
8.0
9.0
9.1
9.2
a7xx-gmem
amber
elima/radv-video-encode-caps-maxbitrate
explicit-sync
main
powervr-mesa-next-wayland
review/fragment_shader_barycentric
staging/23.2
staging/23.3
staging/24.0
staging/24.1
uav-counter-meta
vk-no-nir-android
zink-stablefix
The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)
brianp
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path:
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src
/
mesa
/
drivers
/
dri
/
i965
/
brw_vs_state.c
Age
Commit message (
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)
Author
Files
Lines
2011-06-20
i965/gen4: Remove old VS unit state key structure.
Eric Anholt
1
-12
/
+0
2011-06-18
i965: Use state streaming on programs, and state base address on gen5+.
Eric Anholt
1
-9
/
+9
2011-04-29
i965/gen4: Move VS state to state streaming.
Eric Anholt
1
-82
/
+48
2011-03-04
i965: Apply a workaround for the Ironlake "vertex flashing".
Eric Anholt
1
-1
/
+8
2010-11-03
intel: Annotate debug printout checks with unlikely().
Eric Anholt
1
-1
/
+1
2010-10-13
Drop GLcontext typedef and use struct gl_context instead
Kristian Høgsberg
1
-1
/
+1
2010-06-08
intel: Convert remaining dri_bo_emit_reloc to drm_intel_bo_emit_reloc.
Eric Anholt
1
-5
/
+3
2010-06-08
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
Eric Anholt
1
-3
/
+3
2010-04-21
intel: Clean up chipset name and gen num for Ironlake
Zhenyu Wang
1
-3
/
+3
2010-01-19
i965: Allow for variable-sized auxdata in the state cache.
Eric Anholt
1
-2
/
+1
2009-12-22
intel: Replace IS_G4X() across the driver with context structure usage.
Eric Anholt
1
-12
/
+2
2009-12-22
intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.
Eric Anholt
1
-3
/
+4
2009-11-13
i965: Validate the number of URB entries selected for the VS.
Eric Anholt
1
-4
/
+33
2009-07-13
i965: add support for new chipsets
Xiang, Haihao
1
-3
/
+15
2009-04-14
i965: checkpoint commit: VS constant buffers
Brian Paul
1
-0
/
+8
2009-02-02
i965: Remove brw->attribs now that we can just always look in the GLcontext.
Eric Anholt
1
-1
/
+3
2008-11-12
i965: Fix up VS max_threads for G4X and removing a magic number.
Eric Anholt
1
-2
/
+14
2008-09-18
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...
Brian Paul
1
-1
/
+1
2008-09-10
intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.
Eric Anholt
1
-5
/
+5
2008-08-24
Revert "Revert "Merge branch 'drm-gem'""
Dave Airlie
1
-7
/
+6
2008-08-24
Revert "Merge branch 'drm-gem'"
Dave Airlie
1
-6
/
+7
2008-08-08
intel-gem: Update to new check_aperture API for classic mode.
Eric Anholt
1
-2
/
+1
2008-06-11
[intel-gem] Chase domain flag renaming in the DRM.
Eric Anholt
1
-1
/
+1
2008-06-03
[intel] Convert drivers to using libdrm bufmgr code.
Eric Anholt
1
-5
/
+5
2008-05-07
GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.
Eric Anholt
1
-1
/
+1
2008-04-18
i965: initial attempt at fixing the aperture overflow
Dave Airlie
1
-2
/
+3
2008-01-03
[intel] Convert relocations to not be cleared out on buffer submit.
Eric Anholt
1
-17
/
+15
2008-01-02
[965] Convert VS unit to use a cache key instead of brw_cache_data.
Eric Anholt
1
-26
/
+63
2007-12-14
[965] Replace the state cache suballocator with direct dri_bufmgr use.
Eric Anholt
1
-3
/
+17
2007-10-04
[965] Replace various alignment code with a shared ALIGN() macro.
Eric Anholt
1
-1
/
+1
2006-09-12
Potential fix for doom3 lockups. Seems that there is a conflict
Keith Whitwell
1
-1
/
+5
2006-08-09
Add Intel i965G/Q DRI driver.
Eric Anholt
1
-0
/
+98