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path: root/src/amd/vulkan/radv_cmd_buffer.c
AgeCommit message (Expand)AuthorFilesLines
2021-02-25radv: do not scale the depth bias for D16_UNORM depth surfacesSamuel Pitoiset1-9/+2
2021-02-24radv: for_each_bit -> foreach_bitMike Blumenkrantz1-20/+10
2021-02-23radv: Implement displayable DCC retiling.Bas Nieuwenhuizen1-0/+9
2021-02-22radv: reset object base on recycled command buffersDave Airlie1-0/+1
2021-02-17radv: stop emitting pipeline bind markersSamuel Pitoiset1-2/+0
2021-02-16radv: Do pipe misalignment check per plane.Bas Nieuwenhuizen1-28/+32
2021-02-12radv: emit pipeline bind markers for SQTTSamuel Pitoiset1-0/+2
2021-02-11radv: use a more relaxed alignment for upload buffer allocationsRhys Perry1-23/+25
2021-02-08radv/winsys: remove the radv_amdgpu_winsys_bo::ws indirectionSamuel Pitoiset1-4/+4
2021-02-03radv: round-up num_records division in radv_flush_vertex_descriptorsRhys Perry1-1/+1
2021-01-27radv: remove mipmaps related assertions when initializing HTILESamuel Pitoiset1-2/+0
2021-01-27radv: check if HTILE is enabled per-level instead of the entire imageSamuel Pitoiset1-2/+2
2021-01-26radv: Fix struct initialization for MSVCJames Park1-1/+1
2021-01-26radv: Modify radv_descriptor_set for MSVC legalityJames Park1-27/+31
2021-01-25radv: synchronize Cmd{Set,Write}Event() using PS_DONE/CS_DONE eventsSamuel Pitoiset1-5/+30
2021-01-19radv: flush L2 for images affected by the pipe misaligned issue on GFX10+Samuel Pitoiset1-5/+73
2021-01-13radv: Use L2 coherency on GFX9+.Bas Nieuwenhuizen1-42/+60
2021-01-13radv: Use access helpers for flushing with meta operations.Bas Nieuwenhuizen1-26/+21
2021-01-13radv: Do dst invalidations for write accesses.Bas Nieuwenhuizen1-1/+7
2021-01-13radv: Invalidate CB on SHADER_WRITE for meta operations.Bas Nieuwenhuizen1-0/+12
2021-01-13radv: Remove redundant WB_L2 flush.Bas Nieuwenhuizen1-1/+0
2021-01-13radv: allocate and initialize the FCE predicate value for CMASK tooSamuel Pitoiset1-3/+3
2021-01-07ac/sqtt: add ac_thread_trace_dataPierre-Eric Pelloux-Prayer1-1/+1
2021-01-05radv: enable TC-compat HTILE in GENERAL on GFX10+Samuel Pitoiset1-7/+9
2021-01-05radv: only load the DS fast clear values for compressed renderingSamuel Pitoiset1-3/+11
2021-01-05radv: add radv_htile_get_initial_value() and document the HTILE dwordSamuel Pitoiset1-1/+1
2021-01-05radv: fix potential HTILE issues for TC-compat images on GFX8Samuel Pitoiset1-1/+1
2021-01-05radv: always clear the SR0/SR1 bits of the HTILE bufferSamuel Pitoiset1-1/+1
2021-01-04radv: Use VRAM for upload buffers if entire VRAM is CPU-visible.Bas Nieuwenhuizen1-1/+13
2020-12-23radv: make sure FMASK compression is enabled for MSAA copiesSamuel Pitoiset1-1/+2
2020-12-21radv: Add option to disable DCC in renderpasses without layout.Bas Nieuwenhuizen1-8/+14
2020-12-21radv: Never allow fast clears on DCC images that are not compressed.Bas Nieuwenhuizen1-6/+10
2020-12-21radv: Don't skip layout transitions that only differ in render loop.Bas Nieuwenhuizen1-1/+1
2020-12-14radv: implement VK_KHR_fragment_shading_rateSamuel Pitoiset1-0/+55
2020-12-07radv: set the predication boolean as 32-bit if necessarySamuel Pitoiset1-2/+6
2020-12-03radv: Don't invalidate the SCACHE for image barriers.Bas Nieuwenhuizen1-1/+1
2020-12-02radv: Replace VLAs with allocaJames Park1-2/+2
2020-11-30radv: save and dump vertex descriptors during GPU hang detectionSamuel Pitoiset1-1/+21
2020-11-27radv: Deal with unused attachments in mip flushBas Nieuwenhuizen1-0/+3
2020-11-27radv: Fix a hang on CB change by adding flushes.Bas Nieuwenhuizen1-0/+74
2020-11-26radv: fix missing initialization of the predication valueSamuel Pitoiset1-1/+1
2020-11-25radv: always use 32-bit predication on compute queuesSamuel Pitoiset1-1/+2
2020-11-25radv: use 32-bit predication for conditional rendering on GFX10.3+Samuel Pitoiset1-39/+48
2020-11-24radv: Fix RB+ blending for VK_FORMAT_E5B9G9R9_UFLOAT_PACK32.Bas Nieuwenhuizen1-0/+5
2020-11-20radv: Fix -Wshadow warningsTony Wasserka1-1/+2
2020-11-18ac: rename num_render_backends -> max_render_backendsMarek Olšák1-1/+1
2020-11-17radv: do VGT_FLUSH when switching NGG -> legacy on Sienna CichlidSamuel Pitoiset1-4/+5
2020-10-30radv: Fix variable name collision.Bas Nieuwenhuizen1-6/+6
2020-10-28radv: Do not access set layout during vkCmdBindDescriptorSets.Bas Nieuwenhuizen1-4/+2
2020-10-27radv: do not perform a FMASK expand for non-writeable MSAA imagesSamuel Pitoiset1-1/+3
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