diff options
Diffstat (limited to 'src/mesa/drivers')
21 files changed, 279 insertions, 425 deletions
diff --git a/src/mesa/drivers/dri/r200/Makefile b/src/mesa/drivers/dri/r200/Makefile index 7064f423dc9..f4c173085b1 100644 --- a/src/mesa/drivers/dri/r200/Makefile +++ b/src/mesa/drivers/dri/r200/Makefile @@ -50,7 +50,8 @@ COMMON_SYMLINKS = \ radeon_screen.c \ radeon_screen.h \ radeon_bo_legacy.h \ - radeon_buffer.h + radeon_buffer.h \ + common_context.h ##### TARGETS ##### diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c index e1633772a18..b7f025ca5ff 100644 --- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c +++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c @@ -321,7 +321,7 @@ void r200EmitVertexAOS( r200ContextPtr rmesa, void r200EmitAOS( r200ContextPtr rmesa, - struct r200_dma_region **component, + struct radeon_dma_region **component, GLuint nr, GLuint offset ) { diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c index 5531e0a7399..e8d4ca25375 100644 --- a/src/mesa/drivers/dri/r200/r200_context.c +++ b/src/mesa/drivers/dri/r200/r200_context.c @@ -341,7 +341,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual, (drmTextureRegionPtr)rmesa->sarea->tex_list[i], & rmesa->sarea->tex_age[i], & rmesa->swapped, - sizeof( r200TexObj ), + sizeof( radeonTexObj ), (destroy_texture_object_t *) r200DestroyTexObj ); } rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache, diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index 14a1dda46ac..dd9944173ae 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -53,49 +53,27 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #error This driver requires a newer libdrm to compile #endif +#include "common_context.h" + struct r200_context; typedef struct r200_context r200ContextRec; typedef struct r200_context *r200ContextPtr; -/* This union is used to avoid warnings/miscompilation - with float to uint32_t casts due to strict-aliasing */ -typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; - #include "r200_lock.h" #include "radeon_screen.h" #include "main/mm.h" -/* Flags for software fallback cases */ -/* See correponding strings in r200_swtcl.c */ -#define R200_FALLBACK_TEXTURE 0x01 -#define R200_FALLBACK_DRAW_BUFFER 0x02 -#define R200_FALLBACK_STENCIL 0x04 -#define R200_FALLBACK_RENDER_MODE 0x08 -#define R200_FALLBACK_DISABLE 0x10 -#define R200_FALLBACK_BORDER_MODE 0x20 - -/* The blit width for texture uploads - */ -#define BLIT_WIDTH_BYTES 1024 - -/* Use the templated vertex format: - */ -#define COLOR_IS_RGBA -#define TAG(x) r200##x -#include "tnl_dd/t_dd_vertex.h" -#undef TAG - typedef void (*r200_tri_func)( r200ContextPtr, - r200Vertex *, - r200Vertex *, - r200Vertex * ); + radeonVertex *, + radeonVertex *, + radeonVertex * ); typedef void (*r200_line_func)( r200ContextPtr, - r200Vertex *, - r200Vertex * ); + radeonVertex *, + radeonVertex * ); typedef void (*r200_point_func)( r200ContextPtr, - r200Vertex * ); + radeonVertex * ); struct r200_vertex_program { @@ -112,93 +90,11 @@ struct r200_vertex_program { int fogmode; }; -struct r200_colorbuffer_state { - GLuint clear; -#if 000 - GLint drawOffset, drawPitch; -#endif - int roundEnable; -}; - - -struct r200_depthbuffer_state { - GLuint clear; - GLfloat scale; -}; - -#if 000 -struct r200_pixel_state { - GLint readOffset, readPitch; -}; -#endif - -struct r200_scissor_state { - drm_clip_rect_t rect; - GLboolean enabled; - - GLuint numClipRects; /* Cliprects active */ - GLuint numAllocedClipRects; /* Cliprects available */ - drm_clip_rect_t *pClipRects; -}; - -struct r200_stencilbuffer_state { - GLboolean hwBuffer; - GLuint clear; /* rb3d_stencilrefmask value */ -}; - -struct r200_stipple_state { - GLuint mask[32]; -}; - - - -#define TEX_0 0x1 -#define TEX_1 0x2 -#define TEX_2 0x4 -#define TEX_3 0x8 -#define TEX_4 0x10 -#define TEX_5 0x20 -#define TEX_ALL 0x3f - -typedef struct r200_tex_obj r200TexObj, *r200TexObjPtr; - -/* Texture object in locally shared texture space. - */ -struct r200_tex_obj { - driTextureObject base; - - GLuint bufAddr; /* Offset to start of locally - shared texture block */ - - GLuint dirty_state; /* Flags (1 per texunit) for - whether or not this texobj - has dirty hardware state - (pp_*) that needs to be - brought into the - texunit. */ - - drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; - /* Six, for the cube faces */ - GLboolean image_override; /* Image overridden by GLX_EXT_tfp */ - - GLuint pp_txfilter; /* hardware register values */ - GLuint pp_txformat; - GLuint pp_txformat_x; - GLuint pp_txoffset; /* Image location in texmem. - All cube faces follow. */ - GLuint pp_txsize; /* npot only */ - GLuint pp_txpitch; /* npot only */ - GLuint pp_border_color; - GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ - - GLboolean border_fallback; - - GLuint tile_bits; /* hw texture tile bits used on this texture */ -}; +#define R200_TEX_ALL 0x3f struct r200_texture_env_state { - r200TexObjPtr texobj; + radeonTexObjPtr texobj; GLuint outputreg; GLuint unitneeded; }; @@ -214,14 +110,13 @@ struct r200_state_atom { struct r200_state_atom *next, *prev; const char *name; /* for debug */ int cmd_size; /* size in bytes */ + GLuint is_tcl; GLuint idx; int *cmd; /* one or more cmd's */ int *lastcmd; /* one or more cmd's */ GLboolean dirty; GLboolean (*check)( GLcontext *, int ); /* is this state active? */ }; - - /* Trying to keep these relatively short as the variables are becoming * extravagently long. Drop the driver name prefix off the front of @@ -648,54 +543,22 @@ struct r200_hw_state { struct r200_state { /* Derived state for internal purposes: */ - struct r200_colorbuffer_state color; - struct r200_depthbuffer_state depth; + struct radeon_colorbuffer_state color; + struct radeon_depthbuffer_state depth; #if 00 struct r200_pixel_state pixel; #endif - struct r200_scissor_state scissor; - struct r200_stencilbuffer_state stencil; - struct r200_stipple_state stipple; + struct radeon_scissor_state scissor; + struct radeon_stencilbuffer_state stencil; + struct radeon_stipple_state stipple; struct r200_texture_state texture; GLuint envneeded; }; -/* Need refcounting on dma buffers: - */ -struct r200_dma_buffer { - int refcount; /* the number of retained regions in buf */ - drmBufPtr buf; -}; - #define GET_START(rvb) (rmesa->r200Screen->gart_buffer_offset + \ (rvb)->address - rmesa->dma.buf0_address + \ (rvb)->start) -/* A retained region, eg vertices for indexed vertices. - */ -struct r200_dma_region { - struct r200_dma_buffer *buf; - char *address; /* == buf->address */ - int start, end, ptr; /* offsets from start of buf */ - int aos_start; - int aos_stride; - int aos_size; -}; - - -struct r200_dma { - /* Active dma region. Allocations for vertices and retained - * regions come from here. Also used for emitting random vertices, - * these may be flushed by calling flush_current(); - */ - struct r200_dma_region current; - - void (*flush)( r200ContextPtr ); - - char *buf0_address; /* start of buf[0], for index calcs */ - GLuint nr_released_bufs; /* flush after so many buffers released */ -}; - struct r200_dri_mirror { __DRIcontextPrivate *context; /* DRI context */ __DRIscreenPrivate *screen; /* DRI screen */ @@ -726,13 +589,13 @@ struct r200_tcl_info { GLuint hw_primitive; /* hw can handle 12 components max */ - struct r200_dma_region *aos_components[12]; + struct radeon_dma_region *aos_components[12]; GLuint nr_aos_components; GLuint *Elts; - struct r200_dma_region indexed_verts; - struct r200_dma_region vertex_data[15]; + struct radeon_dma_region indexed_verts; + struct radeon_dma_region vertex_data[15]; }; @@ -788,26 +651,11 @@ struct r200_swtcl_info { */ GLboolean needproj; - struct r200_dma_region indexed_verts; -}; - - -struct r200_ioctl { - GLuint vertex_offset; - GLuint vertex_size; + struct radeon_dma_region indexed_verts; }; -#define R200_MAX_PRIMS 64 - - - -struct r200_prim { - GLuint start; - GLuint end; - GLuint prim; -}; /* A maximum total of 29 elements per vertex: 3 floats for position, 3 * floats for normal, 4 floats for color, 4 bytes for secondary color, @@ -849,8 +697,8 @@ struct r200_context { /* Vertex buffers */ - struct r200_ioctl ioctl; - struct r200_dma dma; + struct radeon_ioctl ioctl; + struct radeon_dma dma; struct r200_store store; /* A full state emit as of the first state emit in the main store, in case * the context is lost. @@ -927,21 +775,6 @@ struct r200_context { #define R200_CONTEXT(ctx) ((r200ContextPtr)(ctx->DriverCtx)) -static INLINE GLuint r200PackColor( GLuint cpp, - GLubyte r, GLubyte g, - GLubyte b, GLubyte a ) -{ - switch ( cpp ) { - case 2: - return PACK_COLOR_565( r, g, b ); - case 4: - return PACK_COLOR_8888( a, r, g, b ); - default: - return 0; - } -} - - extern void r200DestroyContext( __DRIcontextPrivate *driContextPriv ); extern GLboolean r200CreateContext( const __GLcontextModes *glVisual, __DRIcontextPrivate *driContextPriv, diff --git a/src/mesa/drivers/dri/r200/r200_fragshader.c b/src/mesa/drivers/dri/r200/r200_fragshader.c index d514b28219a..85c1b7bdd19 100644 --- a/src/mesa/drivers/dri/r200/r200_fragshader.c +++ b/src/mesa/drivers/dri/r200/r200_fragshader.c @@ -522,7 +522,7 @@ static void r200UpdateFSConstants( GLcontext *ctx ) CLAMPED_FLOAT_TO_UBYTE(con_byte[2], ctx->ATIFragmentShader.GlobalConstants[i][2]); CLAMPED_FLOAT_TO_UBYTE(con_byte[3], ctx->ATIFragmentShader.GlobalConstants[i][3]); } - rmesa->hw.atf.cmd[ATF_TFACTOR_0 + i] = r200PackColor ( + rmesa->hw.atf.cmd[ATF_TFACTOR_0 + i] = radeonPackColor ( 4, con_byte[0], con_byte[1], con_byte[2], con_byte[3] ); } } diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index 0741e57af71..8ad3a676738 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -194,7 +194,7 @@ void r200FlushCmdBuf( r200ContextPtr rmesa, const char *caller ) void r200RefillCurrentDmaRegion( r200ContextPtr rmesa ) { - struct r200_dma_buffer *dmabuf; + struct radeon_dma_buffer *dmabuf; int fd = rmesa->dri.fd; int index = 0; int size = 0; @@ -248,7 +248,7 @@ void r200RefillCurrentDmaRegion( r200ContextPtr rmesa ) if (R200_DEBUG & DEBUG_DMA) fprintf(stderr, "Allocated buffer %d\n", index); - dmabuf = CALLOC_STRUCT( r200_dma_buffer ); + dmabuf = CALLOC_STRUCT( radeon_dma_buffer ); dmabuf->buf = &rmesa->r200Screen->buffers->list[index]; dmabuf->refcount = 1; @@ -260,7 +260,7 @@ void r200RefillCurrentDmaRegion( r200ContextPtr rmesa ) } void r200ReleaseDmaRegion( r200ContextPtr rmesa, - struct r200_dma_region *region, + struct radeon_dma_region *region, const char *caller ) { if (R200_DEBUG & DEBUG_IOCTL) @@ -295,7 +295,7 @@ void r200ReleaseDmaRegion( r200ContextPtr rmesa, * space in current, grab a new buffer (and discard what was left of current) */ void r200AllocDmaRegion( r200ContextPtr rmesa, - struct r200_dma_region *region, + struct radeon_dma_region *region, int bytes, int alignment ) { diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h index f7458e4a0ed..b760dd6eeca 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.h +++ b/src/mesa/drivers/dri/r200/r200_ioctl.h @@ -59,7 +59,7 @@ extern GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, GLuint min_nr ); extern void r200EmitAOS( r200ContextPtr rmesa, - struct r200_dma_region **regions, + struct radeon_dma_region **regions, GLuint n, GLuint offset ); @@ -81,12 +81,12 @@ extern int r200FlushCmdBufLocked( r200ContextPtr rmesa, const char * caller ); extern void r200RefillCurrentDmaRegion( r200ContextPtr rmesa ); extern void r200AllocDmaRegion( r200ContextPtr rmesa, - struct r200_dma_region *region, + struct radeon_dma_region *region, int bytes, int alignment ); extern void r200ReleaseDmaRegion( r200ContextPtr rmesa, - struct r200_dma_region *region, + struct radeon_dma_region *region, const char *caller ); extern void r200CopyBuffer( __DRIdrawablePrivate *drawable, diff --git a/src/mesa/drivers/dri/r200/r200_maos_arrays.c b/src/mesa/drivers/dri/r200/r200_maos_arrays.c index 8512b9af478..838dfe79f9d 100644 --- a/src/mesa/drivers/dri/r200/r200_maos_arrays.c +++ b/src/mesa/drivers/dri/r200/r200_maos_arrays.c @@ -61,7 +61,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ static void emit_ubyte_rgba3( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int stride, int count ) @@ -84,7 +84,7 @@ static void emit_ubyte_rgba3( GLcontext *ctx, } static void emit_ubyte_rgba4( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int stride, int count ) @@ -109,7 +109,7 @@ static void emit_ubyte_rgba4( GLcontext *ctx, static void emit_ubyte_rgba( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int size, int stride, @@ -176,7 +176,7 @@ do { \ static void emit_vecfog( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int stride, int count ) @@ -219,7 +219,7 @@ static void emit_vecfog( GLcontext *ctx, static void emit_vec4( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int stride, int count ) @@ -243,7 +243,7 @@ static void emit_vec4( GLcontext *ctx, static void emit_vec8( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int stride, int count ) @@ -267,7 +267,7 @@ static void emit_vec8( GLcontext *ctx, } static void emit_vec12( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int stride, int count ) @@ -292,7 +292,7 @@ static void emit_vec12( GLcontext *ctx, } static void emit_vec16( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int stride, int count ) @@ -319,7 +319,7 @@ static void emit_vec16( GLcontext *ctx, static void emit_vector( GLcontext *ctx, - struct r200_dma_region *rvb, + struct radeon_dma_region *rvb, char *data, int size, int stride, @@ -379,7 +379,7 @@ void r200EmitArrays( GLcontext *ctx, GLubyte *vimap_rev ) { r200ContextPtr rmesa = R200_CONTEXT( ctx ); struct vertex_buffer *VB = &TNL_CONTEXT( ctx )->vb; - struct r200_dma_region **component = rmesa->tcl.aos_components; + struct radeon_dma_region **component = rmesa->tcl.aos_components; GLuint nr = 0; GLuint vfmt0 = 0, vfmt1 = 0; GLuint count = VB->Count; diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 0eaaaf69ac7..7fd93a749e5 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -115,7 +115,7 @@ static void r200BlendColor( GLcontext *ctx, const GLfloat cf[4] ) CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]); CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]); if (rmesa->r200Screen->drmSupportsBlendColor) - rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = r200PackColor( 4, color[0], color[1], color[2], color[3] ); + rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] ); } /** @@ -480,7 +480,7 @@ static void r200Fogfv( GLcontext *ctx, GLenum pname, const GLfloat *param ) case GL_FOG_COLOR: R200_STATECHANGE( rmesa, ctx ); UNCLAMPED_FLOAT_TO_RGB_CHAN( col, ctx->Fog.Color ); - i = r200PackColor( 4, col[0], col[1], col[2], 0 ); + i = radeonPackColor( 4, col[0], col[1], col[2], 0 ); rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] &= ~R200_FOG_COLOR_MASK; rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] |= i; break; @@ -803,7 +803,7 @@ static void r200ColorMask( GLcontext *ctx, GLboolean b, GLboolean a ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); - GLuint mask = r200PackColor( rmesa->r200Screen->cpp, + GLuint mask = radeonPackColor( rmesa->r200Screen->cpp, ctx->Color.ColorMask[RCOMP], ctx->Color.ColorMask[GCOMP], ctx->Color.ColorMask[BCOMP], @@ -1805,7 +1805,7 @@ static void r200ClearColor( GLcontext *ctx, const GLfloat c[4] ) CLAMPED_FLOAT_TO_UBYTE(color[1], c[1]); CLAMPED_FLOAT_TO_UBYTE(color[2], c[2]); CLAMPED_FLOAT_TO_UBYTE(color[3], c[3]); - rmesa->state.color.clear = r200PackColor( rmesa->r200Screen->cpp, + rmesa->state.color.clear = radeonPackColor( rmesa->r200Screen->cpp, color[0], color[1], color[2], color[3] ); } diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index b25f0282445..e4a5c129cec 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -284,7 +284,7 @@ static void flush_last_swtcl_prim( r200ContextPtr rmesa ) rmesa->dma.flush = NULL; if (rmesa->dma.current.buf) { - struct r200_dma_region *current = &rmesa->dma.current; + struct radeon_dma_region *current = &rmesa->dma.current; GLuint current_offset = (rmesa->r200Screen->gart_buffer_offset + current->buf->buf->idx * RADEON_BUFFER_SIZE + current->start); @@ -397,8 +397,8 @@ static void r200ResetLineStipple( GLcontext *ctx ); #define LOCAL_VARS \ r200ContextPtr rmesa = R200_CONTEXT(ctx); \ const char *r200verts = (char *)rmesa->swtcl.verts; -#define VERT(x) (r200Vertex *)(r200verts + ((x) * vertsize * sizeof(int))) -#define VERTEX r200Vertex +#define VERT(x) (radeonVertex *)(r200verts + ((x) * vertsize * sizeof(int))) +#define VERTEX radeonVertex #define DO_DEBUG_VERTS (1 && (R200_DEBUG & DEBUG_VERTS)) #undef TAG @@ -460,7 +460,7 @@ static struct { #define VERT_SET_RGBA( v, c ) \ do { \ - r200_color_t *color = (r200_color_t *)&((v)->ui[coloroffset]); \ + radeon_color_t *color = (radeon_color_t *)&((v)->ui[coloroffset]); \ UNCLAMPED_FLOAT_TO_UBYTE(color->red, (c)[0]); \ UNCLAMPED_FLOAT_TO_UBYTE(color->green, (c)[1]); \ UNCLAMPED_FLOAT_TO_UBYTE(color->blue, (c)[2]); \ @@ -472,7 +472,7 @@ do { \ #define VERT_SET_SPEC( v, c ) \ do { \ if (specoffset) { \ - r200_color_t *spec = (r200_color_t *)&((v)->ui[specoffset]); \ + radeon_color_t *spec = (radeon_color_t *)&((v)->ui[specoffset]); \ UNCLAMPED_FLOAT_TO_UBYTE(spec->red, (c)[0]); \ UNCLAMPED_FLOAT_TO_UBYTE(spec->green, (c)[1]); \ UNCLAMPED_FLOAT_TO_UBYTE(spec->blue, (c)[2]); \ @@ -481,8 +481,8 @@ do { \ #define VERT_COPY_SPEC( v0, v1 ) \ do { \ if (specoffset) { \ - r200_color_t *spec0 = (r200_color_t *)&((v0)->ui[specoffset]); \ - r200_color_t *spec1 = (r200_color_t *)&((v1)->ui[specoffset]); \ + radeon_color_t *spec0 = (radeon_color_t *)&((v0)->ui[specoffset]); \ + radeon_color_t *spec1 = (radeon_color_t *)&((v1)->ui[specoffset]); \ spec0->red = spec1->red; \ spec0->green = spec1->green; \ spec0->blue = spec1->blue; \ @@ -772,7 +772,7 @@ r200PointsBitmap( GLcontext *ctx, GLint px, GLint py, r200ContextPtr rmesa = R200_CONTEXT(ctx); const GLfloat *rc = ctx->Current.RasterColor; GLint row, col; - r200Vertex vert; + radeonVertex vert; GLuint orig_vte; GLuint h; diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.h b/src/mesa/drivers/dri/r200/r200_swtcl.h index 8c29fd0c999..0c25d8bc83d 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.h +++ b/src/mesa/drivers/dri/r200/r200_swtcl.h @@ -57,10 +57,10 @@ extern void r200_emit_indexed_verts( GLcontext *ctx, GLuint count ); extern void r200_translate_vertex( GLcontext *ctx, - const r200Vertex *src, + const radeonVertex *src, SWvertex *dst ); -extern void r200_print_vertex( GLcontext *ctx, const r200Vertex *v ); +extern void r200_print_vertex( GLcontext *ctx, const radeonVertex *v ); extern void r200_import_float_colors( GLcontext *ctx ); extern void r200_import_float_spec_colors( GLcontext *ctx ); diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c index 5a4db33f441..0cd93253664 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.c +++ b/src/mesa/drivers/dri/r200/r200_tex.c @@ -63,7 +63,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * \param twrap Wrap mode for the \a t texture coordinate */ -static void r200SetTexWrap( r200TexObjPtr t, GLenum swrap, GLenum twrap, GLenum rwrap ) +static void r200SetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap, GLenum rwrap ) { GLboolean is_clamp = GL_FALSE; GLboolean is_clamp_to_border = GL_FALSE; @@ -180,7 +180,7 @@ static void r200SetTexWrap( r200TexObjPtr t, GLenum swrap, GLenum twrap, GLenum t->border_fallback = (is_clamp && is_clamp_to_border); } -static void r200SetTexMaxAnisotropy( r200TexObjPtr t, GLfloat max ) +static void r200SetTexMaxAnisotropy( radeonTexObjPtr t, GLfloat max ) { t->pp_txfilter &= ~R200_MAX_ANISO_MASK; @@ -205,7 +205,7 @@ static void r200SetTexMaxAnisotropy( r200TexObjPtr t, GLfloat max ) * \param magf Texture magnification mode */ -static void r200SetTexFilter( r200TexObjPtr t, GLenum minf, GLenum magf ) +static void r200SetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf ) { GLuint anisotropy = (t->pp_txfilter & R200_MAX_ANISO_MASK); @@ -267,9 +267,9 @@ static void r200SetTexFilter( r200TexObjPtr t, GLenum minf, GLenum magf ) } } -static void r200SetTexBorderColor( r200TexObjPtr t, GLubyte c[4] ) +static void r200SetTexBorderColor( radeonTexObjPtr t, GLubyte c[4] ) { - t->pp_border_color = r200PackColor( 4, c[0], c[1], c[2], c[3] ); + t->pp_border_color = radeonPackColor( 4, c[0], c[1], c[2], c[3] ); } @@ -279,11 +279,11 @@ static void r200SetTexBorderColor( r200TexObjPtr t, GLubyte c[4] ) * texture after it was swapped out or teximaged again. */ -static r200TexObjPtr r200AllocTexObj( struct gl_texture_object *texObj ) +static radeonTexObjPtr r200AllocTexObj( struct gl_texture_object *texObj ) { - r200TexObjPtr t; + radeonTexObjPtr t; - t = CALLOC_STRUCT( r200_tex_obj ); + t = CALLOC_STRUCT( radeon_tex_obj ); texObj->DriverData = t; if ( t != NULL ) { if ( R200_DEBUG & DEBUG_TEXTURE ) { @@ -978,7 +978,7 @@ static void r200TexEnv( GLcontext *ctx, GLenum target, GLubyte c[4]; GLuint envColor; UNCLAMPED_FLOAT_TO_RGBA_CHAN( c, texUnit->EnvColor ); - envColor = r200PackColor( 4, c[0], c[1], c[2], c[3] ); + envColor = radeonPackColor( 4, c[0], c[1], c[2], c[3] ); if ( rmesa->hw.tf.cmd[TF_TFACTOR_0 + unit] != envColor ) { R200_STATECHANGE( rmesa, tf ); rmesa->hw.tf.cmd[TF_TFACTOR_0 + unit] = envColor; @@ -1034,7 +1034,7 @@ static void r200TexParameter( GLcontext *ctx, GLenum target, struct gl_texture_object *texObj, GLenum pname, const GLfloat *params ) { - r200TexObjPtr t = (r200TexObjPtr) texObj->DriverData; + radeonTexObjPtr t = (radeonTexObjPtr) texObj->DriverData; if ( R200_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) { fprintf( stderr, "%s( %s )\n", __FUNCTION__, @@ -1077,7 +1077,7 @@ static void r200TexParameter( GLcontext *ctx, GLenum target, /* Mark this texobj as dirty (one bit per tex unit) */ - t->dirty_state = TEX_ALL; + t->dirty_state = R200_TEX_ALL; } diff --git a/src/mesa/drivers/dri/r200/r200_tex.h b/src/mesa/drivers/dri/r200/r200_tex.h index 10ff8e8a660..55592ed4f74 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.h +++ b/src/mesa/drivers/dri/r200/r200_tex.h @@ -41,9 +41,9 @@ extern void r200SetTexOffset(__DRIcontext *pDRICtx, GLint texname, extern void r200UpdateTextureState( GLcontext *ctx ); -extern int r200UploadTexImages( r200ContextPtr rmesa, r200TexObjPtr t, GLuint face ); +extern int r200UploadTexImages( r200ContextPtr rmesa, radeonTexObjPtr t, GLuint face ); -extern void r200DestroyTexObj( r200ContextPtr rmesa, r200TexObjPtr t ); +extern void r200DestroyTexObj( r200ContextPtr rmesa, radeonTexObjPtr t ); extern void r200InitTextureFuncs( struct dd_function_table *functions ); diff --git a/src/mesa/drivers/dri/r200/r200_texmem.c b/src/mesa/drivers/dri/r200/r200_texmem.c index 3b81ac0c802..a8ff5394bff 100644 --- a/src/mesa/drivers/dri/r200/r200_texmem.c +++ b/src/mesa/drivers/dri/r200/r200_texmem.c @@ -55,7 +55,7 @@ SOFTWARE. * include NULLing out hardware state that points to the texture. */ void -r200DestroyTexObj( r200ContextPtr rmesa, r200TexObjPtr t ) +r200DestroyTexObj( r200ContextPtr rmesa, radeonTexObjPtr t ) { if ( R200_DEBUG & DEBUG_TEXTURE ) { fprintf( stderr, "%s( %p, %p )\n", __FUNCTION__, @@ -83,7 +83,7 @@ r200DestroyTexObj( r200ContextPtr rmesa, r200TexObjPtr t ) static void r200UploadGARTClientSubImage( r200ContextPtr rmesa, - r200TexObjPtr t, + radeonTexObjPtr t, struct gl_texture_image *texImage, GLint hwlevel, GLint x, GLint y, @@ -147,7 +147,7 @@ static void r200UploadGARTClientSubImage( r200ContextPtr rmesa, } static void r200UploadRectSubImage( r200ContextPtr rmesa, - r200TexObjPtr t, + radeonTexObjPtr t, struct gl_texture_image *texImage, GLint x, GLint y, GLint width, GLint height ) @@ -216,7 +216,7 @@ static void r200UploadRectSubImage( r200ContextPtr rmesa, /* Data not in GART memory, or bad pitch. */ for (done = 0; done < height ; ) { - struct r200_dma_region region; + struct radeon_dma_region region; int lines = MIN2( height - done, RADEON_BUFFER_SIZE / dstPitch ); int src_pitch; char *tex; @@ -273,7 +273,7 @@ static void r200UploadRectSubImage( r200ContextPtr rmesa, * Upload the texture image associated with texture \a t at the specified * level at the address relative to \a start. */ -static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t, +static void uploadSubImage( r200ContextPtr rmesa, radeonTexObjPtr t, GLint hwlevel, GLint x, GLint y, GLint width, GLint height, GLuint face ) @@ -458,7 +458,7 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t, * \param face Cube map face to be uploaded. Zero for non-cube maps. */ -int r200UploadTexImages( r200ContextPtr rmesa, r200TexObjPtr t, GLuint face ) +int r200UploadTexImages( r200ContextPtr rmesa, radeonTexObjPtr t, GLuint face ) { const int numLevels = t->base.lastLevel - t->base.firstLevel + 1; @@ -500,7 +500,7 @@ int r200UploadTexImages( r200ContextPtr rmesa, r200TexObjPtr t, GLuint face ) /* Mark this texobj as dirty on all units: */ - t->dirty_state = TEX_ALL; + t->dirty_state = R200_TEX_ALL; } /* Let the world know we've used this memory recently. diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 3f9a2f4ac1b..eeccf50c449 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -153,7 +153,7 @@ static const struct tx_table tx_table_le[] = static void r200SetTexImages( r200ContextPtr rmesa, struct gl_texture_object *tObj ) { - r200TexObjPtr t = (r200TexObjPtr)tObj->DriverData; + radeonTexObjPtr t = (radeonTexObjPtr)tObj->DriverData; const struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel]; GLint curOffset, blitWidth; GLint i, texelBytes; @@ -383,7 +383,7 @@ static void r200SetTexImages( r200ContextPtr rmesa, t->pp_txpitch -= 32; } - t->dirty_state = TEX_ALL; + t->dirty_state = R200_TEX_ALL; /* FYI: r200UploadTexImages( rmesa, t ) used to be called here */ } @@ -982,12 +982,12 @@ void r200SetTexOffset(__DRIcontext * pDRICtx, GLint texname, r200ContextPtr rmesa = pDRICtx->driverPrivate; struct gl_texture_object *tObj = _mesa_lookup_texture(rmesa->glCtx, texname); - r200TexObjPtr t; + radeonTexObjPtr t; if (!tObj) return; - t = (r200TexObjPtr) tObj->DriverData; + t = (radeonTexObjPtr) tObj->DriverData; t->image_override = GL_TRUE; @@ -1209,7 +1209,7 @@ static GLboolean r200UpdateAllTexEnv( GLcontext *ctx ) static void import_tex_obj_state( r200ContextPtr rmesa, int unit, - r200TexObjPtr texobj ) + radeonTexObjPtr texobj ) { /* do not use RADEON_DB_STATE to avoid stale texture caches */ int *cmd = &rmesa->hw.tex[unit].cmd[TEX_CMD_0]; @@ -1580,7 +1580,7 @@ static GLboolean enable_tex_2d( GLcontext *ctx, int unit ) r200ContextPtr rmesa = R200_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *tObj = texUnit->_Current; - r200TexObjPtr t = (r200TexObjPtr) tObj->DriverData; + radeonTexObjPtr t = (radeonTexObjPtr) tObj->DriverData; /* Need to load the 2d images associated with this unit. */ @@ -1594,7 +1594,7 @@ static GLboolean enable_tex_2d( GLcontext *ctx, int unit ) if ( t->base.dirty_images[0] ) { R200_FIREVERTICES( rmesa ); r200SetTexImages( rmesa, tObj ); - r200UploadTexImages( rmesa, (r200TexObjPtr) tObj->DriverData, 0 ); + r200UploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, 0 ); if ( !t->base.memBlock && !t->image_override ) return GL_FALSE; } @@ -1610,7 +1610,7 @@ static GLboolean enable_tex_3d( GLcontext *ctx, int unit ) r200ContextPtr rmesa = R200_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *tObj = texUnit->_Current; - r200TexObjPtr t = (r200TexObjPtr) tObj->DriverData; + radeonTexObjPtr t = (radeonTexObjPtr) tObj->DriverData; /* Need to load the 3d images associated with this unit. */ @@ -1630,7 +1630,7 @@ static GLboolean enable_tex_3d( GLcontext *ctx, int unit ) if ( t->base.dirty_images[0] ) { R200_FIREVERTICES( rmesa ); r200SetTexImages( rmesa, tObj ); - r200UploadTexImages( rmesa, (r200TexObjPtr) tObj->DriverData, 0 ); + r200UploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, 0 ); if ( !t->base.memBlock ) return GL_FALSE; } @@ -1646,7 +1646,7 @@ static GLboolean enable_tex_cube( GLcontext *ctx, int unit ) r200ContextPtr rmesa = R200_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *tObj = texUnit->_Current; - r200TexObjPtr t = (r200TexObjPtr) tObj->DriverData; + radeonTexObjPtr t = (radeonTexObjPtr) tObj->DriverData; GLuint face; /* Need to load the 2d images associated with this unit. @@ -1671,7 +1671,7 @@ static GLboolean enable_tex_cube( GLcontext *ctx, int unit ) /* upload (per face) */ for (face = 0; face < 6; face++) { if (t->base.dirty_images[face]) { - r200UploadTexImages( rmesa, (r200TexObjPtr) tObj->DriverData, face ); + r200UploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, face ); } } @@ -1690,7 +1690,7 @@ static GLboolean enable_tex_rect( GLcontext *ctx, int unit ) r200ContextPtr rmesa = R200_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *tObj = texUnit->_Current; - r200TexObjPtr t = (r200TexObjPtr) tObj->DriverData; + radeonTexObjPtr t = (radeonTexObjPtr) tObj->DriverData; if (!(t->pp_txformat & R200_TXFORMAT_NON_POWER2)) { t->pp_txformat |= R200_TXFORMAT_NON_POWER2; @@ -1702,7 +1702,7 @@ static GLboolean enable_tex_rect( GLcontext *ctx, int unit ) if ( t->base.dirty_images[0] ) { R200_FIREVERTICES( rmesa ); r200SetTexImages( rmesa, tObj ); - r200UploadTexImages( rmesa, (r200TexObjPtr) tObj->DriverData, 0 ); + r200UploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, 0 ); if ( !t->base.memBlock && !t->image_override && !rmesa->prefer_gart_client_texturing ) @@ -1720,7 +1720,7 @@ static GLboolean update_tex_common( GLcontext *ctx, int unit ) r200ContextPtr rmesa = R200_CONTEXT(ctx); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *tObj = texUnit->_Current; - r200TexObjPtr t = (r200TexObjPtr) tObj->DriverData; + radeonTexObjPtr t = (radeonTexObjPtr) tObj->DriverData; /* Fallback if there's a texture border */ if ( tObj->Image[0][tObj->BaseLevel]->Border > 0 ) diff --git a/src/mesa/drivers/dri/radeon/common_context.h b/src/mesa/drivers/dri/radeon/common_context.h new file mode 100644 index 00000000000..e9bf4137864 --- /dev/null +++ b/src/mesa/drivers/dri/radeon/common_context.h @@ -0,0 +1,178 @@ +/* This union is used to avoid warnings/miscompilation + with float to uint32_t casts due to strict-aliasing */ +typedef union { GLfloat f; uint32_t ui32; } float_ui32_type; + +#include "main/mm.h" +#include "math/m_vector.h" + + +#define TEX_0 0x1 +#define TEX_1 0x2 +#define TEX_2 0x4 +#define TEX_3 0x8 +#define TEX_4 0x10 +#define TEX_5 0x20 + +/* Rasterizing fallbacks */ +/* See correponding strings in r200_swtcl.c */ +#define RADEON_FALLBACK_TEXTURE 0x0001 +#define RADEON_FALLBACK_DRAW_BUFFER 0x0002 +#define RADEON_FALLBACK_STENCIL 0x0004 +#define RADEON_FALLBACK_RENDER_MODE 0x0008 +#define RADEON_FALLBACK_BLEND_EQ 0x0010 +#define RADEON_FALLBACK_BLEND_FUNC 0x0020 +#define RADEON_FALLBACK_DISABLE 0x0040 +#define RADEON_FALLBACK_BORDER_MODE 0x0080 + +#define R200_FALLBACK_TEXTURE 0x01 +#define R200_FALLBACK_DRAW_BUFFER 0x02 +#define R200_FALLBACK_STENCIL 0x04 +#define R200_FALLBACK_RENDER_MODE 0x08 +#define R200_FALLBACK_DISABLE 0x10 +#define R200_FALLBACK_BORDER_MODE 0x20 + +/* The blit width for texture uploads + */ +#define BLIT_WIDTH_BYTES 1024 + +/* Use the templated vertex format: + */ +#define COLOR_IS_RGBA +#define TAG(x) radeon##x +#include "tnl_dd/t_dd_vertex.h" +#undef TAG + +struct radeon_colorbuffer_state { + GLuint clear; + int roundEnable; +}; + +struct radeon_depthbuffer_state { + GLuint clear; + GLfloat scale; +}; + +struct radeon_scissor_state { + drm_clip_rect_t rect; + GLboolean enabled; + + GLuint numClipRects; /* Cliprects active */ + GLuint numAllocedClipRects; /* Cliprects available */ + drm_clip_rect_t *pClipRects; +}; + +struct radeon_stencilbuffer_state { + GLboolean hwBuffer; + GLuint clear; /* rb3d_stencilrefmask value */ +}; + +struct radeon_stipple_state { + GLuint mask[32]; +}; + +struct radeon_state_atom { + struct radeon_state_atom *next, *prev; + const char *name; /* for debug */ + int cmd_size; /* size in bytes */ + GLuint is_tcl; + int *cmd; /* one or more cmd's */ + int *lastcmd; /* one or more cmd's */ + GLboolean dirty; /* dirty-mark in emit_state_list */ + GLboolean(*check) (GLcontext *); /* is this state active? */ +}; + +typedef struct radeon_tex_obj radeonTexObj, *radeonTexObjPtr; + +/* Texture object in locally shared texture space. + */ +struct radeon_tex_obj { + driTextureObject base; + + GLuint bufAddr; /* Offset to start of locally + shared texture block */ + + GLuint dirty_state; /* Flags (1 per texunit) for + whether or not this texobj + has dirty hardware state + (pp_*) that needs to be + brought into the + texunit. */ + + drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; + /* Six, for the cube faces */ + + GLboolean image_override; /* Image overridden by GLX_EXT_tfp */ + + GLuint pp_txfilter; /* hardware register values */ + GLuint pp_txformat; + GLuint pp_txformat_x; + GLuint pp_txoffset; /* Image location in texmem. + All cube faces follow. */ + GLuint pp_txsize; /* npot only */ + GLuint pp_txpitch; /* npot only */ + GLuint pp_border_color; + GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ + + GLboolean border_fallback; + + GLuint tile_bits; /* hw texture tile bits used on this texture */ +}; + +/* Need refcounting on dma buffers: + */ +struct radeon_dma_buffer { + int refcount; /* the number of retained regions in buf */ + drmBufPtr buf; +}; + +/* A retained region, eg vertices for indexed vertices. + */ +struct radeon_dma_region { + struct radeon_dma_buffer *buf; + char *address; /* == buf->address */ + int start, end, ptr; /* offsets from start of buf */ + int aos_start; + int aos_stride; + int aos_size; +}; + + +struct radeon_dma { + /* Active dma region. Allocations for vertices and retained + * regions come from here. Also used for emitting random vertices, + * these may be flushed by calling flush_current(); + */ + struct radeon_dma_region current; + + void (*flush)( void * ); + + char *buf0_address; /* start of buf[0], for index calcs */ + GLuint nr_released_bufs; /* flush after so many buffers released */ +}; + +struct radeon_ioctl { + GLuint vertex_offset; + GLuint vertex_size; +}; + +#define RADEON_MAX_PRIMS 64 + +struct radeon_prim { + GLuint start; + GLuint end; + GLuint prim; +}; + +static INLINE GLuint radeonPackColor(GLuint cpp, + GLubyte r, GLubyte g, + GLubyte b, GLubyte a) +{ + switch (cpp) { + case 2: + return PACK_COLOR_565(r, g, b); + case 4: + return PACK_COLOR_8888(a, r, g, b); + default: + return 0; + } +} diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h index 53df766f8cb..75ec2d15dd8 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_context.h @@ -57,45 +57,12 @@ struct radeon_context; typedef struct radeon_context radeonContextRec; typedef struct radeon_context *radeonContextPtr; -/* This union is used to avoid warnings/miscompilation - with float to uint32_t casts due to strict-aliasing */ -typedef union { - GLfloat f; - uint32_t ui32; -} float_ui32_type; - #include "radeon_lock.h" #include "radeon_screen.h" -#include "main/mm.h" - -#include "math/m_vector.h" - -#define TEX_0 0x1 -#define TEX_1 0x2 -#define TEX_2 0x4 -#define TEX_ALL 0x7 - -/* Rasterizing fallbacks */ -/* See correponding strings in r200_swtcl.c */ -#define RADEON_FALLBACK_TEXTURE 0x0001 -#define RADEON_FALLBACK_DRAW_BUFFER 0x0002 -#define RADEON_FALLBACK_STENCIL 0x0004 -#define RADEON_FALLBACK_RENDER_MODE 0x0008 -#define RADEON_FALLBACK_BLEND_EQ 0x0010 -#define RADEON_FALLBACK_BLEND_FUNC 0x0020 -#define RADEON_FALLBACK_DISABLE 0x0040 -#define RADEON_FALLBACK_BORDER_MODE 0x0080 - -/* The blit width for texture uploads - */ -#define BLIT_WIDTH_BYTES 1024 -/* Use the templated vertex format: - */ -#define COLOR_IS_RGBA -#define TAG(x) radeon##x -#include "tnl_dd/t_dd_vertex.h" -#undef TAG +#include "common_context.h" + +#define R100_TEX_ALL 0x7 typedef void (*radeon_tri_func) (radeonContextPtr, radeonVertex *, @@ -106,33 +73,7 @@ typedef void (*radeon_line_func) (radeonContextPtr, typedef void (*radeon_point_func) (radeonContextPtr, radeonVertex *); -struct radeon_colorbuffer_state { - GLuint clear; - int roundEnable; -}; -struct radeon_depthbuffer_state { - GLuint clear; - GLfloat scale; -}; - -struct radeon_scissor_state { - drm_clip_rect_t rect; - GLboolean enabled; - - GLuint numClipRects; /* Cliprects active */ - GLuint numAllocedClipRects; /* Cliprects available */ - drm_clip_rect_t *pClipRects; -}; - -struct radeon_stencilbuffer_state { - GLboolean hwBuffer; - GLuint clear; /* rb3d_stencilrefmask value */ -}; - -struct radeon_stipple_state { - GLuint mask[32]; -}; /* used for both tcl_vtx and vc_frmt tex bits (they are identical) */ #define RADEON_ST_BIT(unit) \ @@ -141,42 +82,6 @@ struct radeon_stipple_state { #define RADEON_Q_BIT(unit) \ (unit == 0 ? RADEON_CP_VC_FRMT_Q0 : (RADEON_CP_VC_FRMT_Q1 >> 2) << (2 * unit)) -typedef struct radeon_tex_obj radeonTexObj, *radeonTexObjPtr; - -/* Texture object in locally shared texture space. - */ -struct radeon_tex_obj { - driTextureObject base; - - GLuint bufAddr; /* Offset to start of locally - shared texture block */ - - GLuint dirty_state; /* Flags (1 per texunit) for - whether or not this texobj - has dirty hardware state - (pp_*) that needs to be - brought into the - texunit. */ - - drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; - /* Six, for the cube faces */ - - GLboolean image_override; /* Image overridden by GLX_EXT_tfp */ - - GLuint pp_txfilter; /* hardware register values */ - GLuint pp_txformat; - GLuint pp_txoffset; /* Image location in texmem. - All cube faces follow. */ - GLuint pp_txsize; /* npot only */ - GLuint pp_txpitch; /* npot only */ - GLuint pp_border_color; - GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ - - GLboolean border_fallback; - - GLuint tile_bits; /* hw texture tile bits used on this texture */ -}; - struct radeon_texture_env_state { radeonTexObjPtr texobj; GLenum format; @@ -187,17 +92,6 @@ struct radeon_texture_state { struct radeon_texture_env_state unit[RADEON_MAX_TEXTURE_UNITS]; }; -struct radeon_state_atom { - struct radeon_state_atom *next, *prev; - const char *name; /* for debug */ - int cmd_size; /* size in bytes */ - GLuint is_tcl; - int *cmd; /* one or more cmd's */ - int *lastcmd; /* one or more cmd's */ - GLboolean dirty; /* dirty-mark in emit_state_list */ - GLboolean(*check) (GLcontext *); /* is this state active? */ -}; - /* Trying to keep these relatively short as the variables are becoming * extravagently long. Drop the driver name prefix off the front of * everything - I think we know which driver we're in by now, and keep the @@ -453,41 +347,10 @@ struct radeon_state { struct radeon_texture_state texture; }; -/* Need refcounting on dma buffers: - */ -struct radeon_dma_buffer { - int refcount; /* the number of retained regions in buf */ - drmBufPtr buf; -}; - #define GET_START(rvb) (rmesa->radeonScreen->gart_buffer_offset + \ (rvb)->address - rmesa->dma.buf0_address + \ (rvb)->start) -/* A retained region, eg vertices for indexed vertices. - */ -struct radeon_dma_region { - struct radeon_dma_buffer *buf; - char *address; /* == buf->address */ - int start, end, ptr; /* offsets from start of buf */ - int aos_start; - int aos_stride; - int aos_size; -}; - -struct radeon_dma { - /* Active dma region. Allocations for vertices and retained - * regions come from here. Also used for emitting random vertices, - * these may be flushed by calling flush_current(); - */ - struct radeon_dma_region current; - - void (*flush) (radeonContextPtr); - - char *buf0_address; /* start of buf[0], for index calcs */ - GLuint nr_released_bufs; /* flush after so many buffers released */ -}; - struct radeon_dri_mirror { __DRIcontextPrivate *context; /* DRI context */ __DRIscreenPrivate *screen; /* DRI screen */ @@ -580,18 +443,7 @@ struct radeon_swtcl_info { struct radeon_dma_region indexed_verts; }; -struct radeon_ioctl { - GLuint vertex_offset; - GLuint vertex_size; -}; -#define RADEON_MAX_PRIMS 64 - -struct radeon_prim { - GLuint start; - GLuint end; - GLuint prim; -}; /* A maximum total of 20 elements per vertex: 3 floats for position, 3 * floats for normal, 4 floats for color, 4 bytes for secondary color, @@ -707,19 +559,6 @@ struct radeon_context { #define RADEON_CONTEXT(ctx) ((radeonContextPtr)(ctx->DriverCtx)) -static INLINE GLuint radeonPackColor(GLuint cpp, - GLubyte r, GLubyte g, - GLubyte b, GLubyte a) -{ - switch (cpp) { - case 2: - return PACK_COLOR_565(r, g, b); - case 4: - return PACK_COLOR_8888(a, r, g, b); - default: - return 0; - } -} #define RADEON_OLD_PACKETS 1 diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 29ae17c52b8..080fbfe5f41 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1042,6 +1042,9 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv) screen->kernel_mm = 1; screen->chip_flags = 0; + ret = radeonGetParam( sPriv->fd, RADEON_PARAM_IRQ_NR, + &screen->irq); + ret = radeonGetParam( sPriv->fd, RADEON_PARAM_DEVICE_ID, &device_id); if (ret) { diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c index b0aec216706..35774ab8c69 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex.c @@ -776,7 +776,7 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target, /* Mark this texobj as dirty (one bit per tex unit) */ - t->dirty_state = TEX_ALL; + t->dirty_state = R100_TEX_ALL; } diff --git a/src/mesa/drivers/dri/radeon/radeon_texmem.c b/src/mesa/drivers/dri/radeon/radeon_texmem.c index 5f7bbe6a4cb..786373d3004 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texmem.c +++ b/src/mesa/drivers/dri/radeon/radeon_texmem.c @@ -373,7 +373,7 @@ int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint fac /* Mark this texobj as dirty on all units: */ - t->dirty_state = TEX_ALL; + t->dirty_state = R100_TEX_ALL; } diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index 1e2f654addf..54674a7fa2a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -350,7 +350,7 @@ static void radeonSetTexImages( radeonContextPtr rmesa, t->pp_txpitch -= 32; } - t->dirty_state = TEX_ALL; + t->dirty_state = R100_TEX_ALL; /* FYI: radeonUploadTexImages( rmesa, t ); used to be called here */ } |