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Diffstat (limited to 'src/mesa/drivers/dri/r600/r700_assembler.c')
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c1588
1 files changed, 1396 insertions, 192 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index 247617408c5..fbd8c45d25d 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -38,6 +38,7 @@
#include "r600_context.h"
#include "r700_assembler.h"
+#include "evergreen_sq.h"
#define USE_CF_FOR_CONTINUE_BREAK 1
#define USE_CF_FOR_POP_AFTER 1
@@ -258,6 +259,18 @@ GLboolean is_reduction_opcode(PVSDWORD* dest)
return GL_FALSE;
}
+GLboolean EG_is_reduction_opcode(PVSDWORD* dest)
+{
+ if (dest->dst.op3 == 0)
+ {
+ if ( (dest->dst.opcode == EG_OP2_INST_DOT4 || dest->dst.opcode == EG_OP2_INST_DOT4_IEEE || dest->dst.opcode == EG_OP2_INST_CUBE) )
+ {
+ return GL_TRUE;
+ }
+ }
+ return GL_FALSE;
+}
+
GLuint GetSurfaceFormat(GLenum eType, GLuint nChannels, GLuint * pClient_size)
{
GLuint format = FMT_INVALID;
@@ -423,6 +436,60 @@ unsigned int r700GetNumOperands(GLuint opcode, GLuint nIsOp3)
return 3;
}
+unsigned int EG_GetNumOperands(GLuint opcode, GLuint nIsOp3)
+{
+ if(nIsOp3 > 0)
+ {
+ return 3;
+ }
+
+ switch (opcode)
+ {
+ case EG_OP2_INST_ADD:
+ case EG_OP2_INST_KILLE:
+ case EG_OP2_INST_KILLGT:
+ case EG_OP2_INST_KILLGE:
+ case EG_OP2_INST_KILLNE:
+ case EG_OP2_INST_MUL:
+ case EG_OP2_INST_MAX:
+ case EG_OP2_INST_MIN:
+ //case EG_OP2_INST_MAX_DX10:
+ //case EG_OP2_INST_MIN_DX10:
+ case EG_OP2_INST_SETE:
+ case EG_OP2_INST_SETNE:
+ case EG_OP2_INST_SETGT:
+ case EG_OP2_INST_SETGE:
+ case EG_OP2_INST_PRED_SETE:
+ case EG_OP2_INST_PRED_SETGT:
+ case EG_OP2_INST_PRED_SETGE:
+ case EG_OP2_INST_PRED_SETNE:
+ case EG_OP2_INST_DOT4:
+ case EG_OP2_INST_DOT4_IEEE:
+ case EG_OP2_INST_CUBE:
+ return 2;
+
+ case EG_OP2_INST_MOV:
+ //case SQ_OP2_INST_MOVA_FLOOR:
+ case EG_OP2_INST_FRACT:
+ case EG_OP2_INST_FLOOR:
+ case EG_OP2_INST_TRUNC:
+ case EG_OP2_INST_EXP_IEEE:
+ case EG_OP2_INST_LOG_CLAMPED:
+ case EG_OP2_INST_LOG_IEEE:
+ case EG_OP2_INST_RECIP_IEEE:
+ case EG_OP2_INST_RECIPSQRT_IEEE:
+ case EG_OP2_INST_FLT_TO_INT:
+ case EG_OP2_INST_SIN:
+ case EG_OP2_INST_COS:
+ return 1;
+
+ default: radeon_error(
+ "Need instruction operand number for %x.\n", opcode);
+ };
+
+ return 3;
+}
+
int Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700_Shader* pShader)
{
GLuint i;
@@ -718,21 +785,55 @@ GLboolean add_vfetch_instruction(r700_AssemblerBase* pAsm,
return GL_FALSE;
}
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.pop_count = 0x0;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.count = 0x0;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_VTX;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.barrier = 0x1;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, EG_CF_INST_VC,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ }
+ else
+ {
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.pop_count = 0x0;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.count = 0x0;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_VTX;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
LinkVertexInstruction(pAsm->cf_current_vtx_clause_ptr, vertex_instruction_ptr );
}
else
{
- pAsm->cf_current_vtx_clause_ptr->m_Word1.f.count++;
+ if(8 == pAsm->unAsic)
+ {
+ unsigned int count = GETbits(pAsm->cf_current_vtx_clause_ptr->m_Word1.val,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask) + 1;
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, count,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_vtx_clause_ptr->m_Word1.f.count++;
+ }
}
AddVTXInstruction(pAsm->pR700Shader, vertex_instruction_ptr);
@@ -767,20 +868,59 @@ GLboolean add_tex_instruction(r700_AssemblerBase* pAsm,
radeon_error("Could not allocate a new TEX CF instruction.\n");
return GL_FALSE;
}
-
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.pop_count = 0x0;
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_TEX;
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.barrier = 0x0; //0x1;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, EG_CF_INST_TC,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+#ifdef FORCE_CF_TEX_BARRIER
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+#else
+ SETfield(pAsm->cf_current_tex_clause_ptr->m_Word1.val, 0,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+#endif
+ }
+ else
+ {
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.pop_count = 0x0;
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_TEX;
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.barrier = 0x0; //0x1;
+ }
}
else
- {
- pAsm->cf_current_tex_clause_ptr->m_Word1.f.count++;
+ {
+ if(8 == pAsm->unAsic)
+ {
+ unsigned int count = GETbits(pAsm->cf_current_tex_clause_ptr->m_Word1.val,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask) + 1;
+ SETfield(pAsm->cf_current_vtx_clause_ptr->m_Word1.val, count,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_tex_clause_ptr->m_Word1.f.count++;
+ }
}
// If this clause constains any TEX instruction that is dependent on a previous instruction,
@@ -891,6 +1031,188 @@ GLboolean assemble_vfetch_instruction(r700_AssemblerBase* pAsm,
return GL_TRUE;
}
+GLboolean EG_assemble_vfetch_instruction(r700_AssemblerBase* pAsm,
+ GLuint destination_register,
+ GLenum type,
+ GLint size,
+ GLubyte element,
+ GLuint _signed,
+ GLboolean normalize,
+ GLenum format,
+ VTX_FETCH_METHOD * pFetchMethod)
+{
+ GLuint client_size_inbyte;
+ GLuint data_format;
+ GLuint mega_fetch_count;
+ GLuint is_mega_fetch_flag;
+
+ GLuint dst_sel_x, dst_sel_y, dst_sel_z, dst_sel_w;
+
+ R700VertexGenericFetch* vfetch_instruction_ptr;
+ R700VertexGenericFetch* assembled_vfetch_instruction_ptr
+ = pAsm->vfetch_instruction_ptr_array[element];
+
+ if (assembled_vfetch_instruction_ptr == NULL)
+ {
+ vfetch_instruction_ptr = (R700VertexGenericFetch*) CALLOC_STRUCT(R700VertexGenericFetch);
+ if (vfetch_instruction_ptr == NULL)
+ {
+ return GL_FALSE;
+ }
+ Init_R700VertexGenericFetch(vfetch_instruction_ptr);
+ }
+ else
+ {
+ vfetch_instruction_ptr = assembled_vfetch_instruction_ptr;
+ }
+
+ data_format = GetSurfaceFormat(type, size, &client_size_inbyte);
+
+ if(GL_TRUE == pFetchMethod->bEnableMini) //More conditions here
+ {
+ //TODO : mini fetch
+ mega_fetch_count = 0;
+ is_mega_fetch_flag = 0;
+ }
+ else
+ {
+ mega_fetch_count = MEGA_FETCH_BYTES - 1;
+ is_mega_fetch_flag = 0x1;
+ pFetchMethod->mega_fetch_remainder = MEGA_FETCH_BYTES - client_size_inbyte;
+ }
+
+ SETfield(vfetch_instruction_ptr->m_Word0.val, EG_VC_INST_FETCH,
+ EG_VTX_WORD0__VC_INST_shift,
+ EG_VTX_WORD0__VC_INST_mask);
+ SETfield(vfetch_instruction_ptr->m_Word0.val, EG_VTX_FETCH_VERTEX_DATA,
+ EG_VTX_WORD0__FETCH_TYPE_shift,
+ EG_VTX_WORD0__FETCH_TYPE_mask);
+ CLEARbit(vfetch_instruction_ptr->m_Word0.val,
+ EG_VTX_WORD0__FWQ_bit);
+ SETfield(vfetch_instruction_ptr->m_Word0.val, element,
+ EG_VTX_WORD0__BUFFER_ID_shift,
+ EG_VTX_WORD0__BUFFER_ID_mask);
+ SETfield(vfetch_instruction_ptr->m_Word0.val, 0x0,
+ EG_VTX_WORD0__SRC_GPR_shift,
+ EG_VTX_WORD0__SRC_GPR_mask);
+ SETfield(vfetch_instruction_ptr->m_Word0.val, SQ_ABSOLUTE,
+ EG_VTX_WORD0__SRC_REL_shift,
+ EG_VTX_WORD0__SRC_REL_bit);
+ SETfield(vfetch_instruction_ptr->m_Word0.val, SQ_SEL_X,
+ EG_VTX_WORD0__SRC_SEL_X_shift,
+ EG_VTX_WORD0__SRC_SEL_X_mask);
+ SETfield(vfetch_instruction_ptr->m_Word0.val, mega_fetch_count,
+ EG_VTX_WORD0__MFC_shift,
+ EG_VTX_WORD0__MFC_mask);
+
+ if(format == GL_BGRA)
+ {
+ dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_Z;
+ dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
+ dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_X;
+ dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
+ }
+ else
+ {
+ dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_X;
+ dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
+ dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_Z;
+ dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
+
+ }
+ SETfield(vfetch_instruction_ptr->m_Word1.val, dst_sel_x,
+ EG_VTX_WORD1__DST_SEL_X_shift,
+ EG_VTX_WORD1__DST_SEL_X_mask);
+ SETfield(vfetch_instruction_ptr->m_Word1.val, dst_sel_y,
+ EG_VTX_WORD1__DST_SEL_Y_shift,
+ EG_VTX_WORD1__DST_SEL_Y_mask);
+ SETfield(vfetch_instruction_ptr->m_Word1.val, dst_sel_z,
+ EG_VTX_WORD1__DST_SEL_Z_shift,
+ EG_VTX_WORD1__DST_SEL_Z_mask);
+ SETfield(vfetch_instruction_ptr->m_Word1.val, dst_sel_w,
+ EG_VTX_WORD1__DST_SEL_W_shift,
+ EG_VTX_WORD1__DST_SEL_W_mask);
+
+ SETfield(vfetch_instruction_ptr->m_Word1.val, 0, /* use format here, in r6/r7, format used set in const, need to use same */
+ EG_VTX_WORD1__UCF_shift,
+ EG_VTX_WORD1__UCF_bit);
+ SETfield(vfetch_instruction_ptr->m_Word1.val, data_format,
+ EG_VTX_WORD1__DATA_FORMAT_shift,
+ EG_VTX_WORD1__DATA_FORMAT_mask);
+#ifdef TEST_VFETCH
+ SETfield(vfetch_instruction_ptr->m_Word1.val, SQ_FORMAT_COMP_SIGNED,
+ EG_VTX_WORD1__FCA_shift,
+ EG_VTX_WORD1__FCA_bit);
+#else
+ if(1 == _signed)
+ {
+ SETfield(vfetch_instruction_ptr->m_Word1.val, SQ_FORMAT_COMP_SIGNED,
+ EG_VTX_WORD1__FCA_shift,
+ EG_VTX_WORD1__FCA_bit);
+ }
+ else
+ {
+ SETfield(vfetch_instruction_ptr->m_Word1.val, SQ_FORMAT_COMP_UNSIGNED,
+ EG_VTX_WORD1__FCA_shift,
+ EG_VTX_WORD1__FCA_bit);
+ }
+#endif /* TEST_VFETCH */
+
+ if(GL_TRUE == normalize)
+ {
+ SETfield(vfetch_instruction_ptr->m_Word1.val, SQ_NUM_FORMAT_NORM,
+ EG_VTX_WORD1__NFA_shift,
+ EG_VTX_WORD1__NFA_mask);
+ }
+ else
+ {
+ SETfield(vfetch_instruction_ptr->m_Word1.val, SQ_NUM_FORMAT_SCALED,
+ EG_VTX_WORD1__NFA_shift,
+ EG_VTX_WORD1__NFA_mask);
+ }
+
+ /* Destination register */
+ SETfield(vfetch_instruction_ptr->m_Word1.val, destination_register,
+ EG_VTX_WORD1_GPR__DST_GPR_shift,
+ EG_VTX_WORD1_GPR__DST_GPR_mask);
+ SETfield(vfetch_instruction_ptr->m_Word1.val, SQ_ABSOLUTE,
+ EG_VTX_WORD1_GPR__DST_REL_shift,
+ EG_VTX_WORD1_GPR__DST_REL_bit);
+
+
+ SETfield(vfetch_instruction_ptr->m_Word2.val, 0,
+ EG_VTX_WORD2__OFFSET_shift,
+ EG_VTX_WORD2__OFFSET_mask);
+ SETfield(vfetch_instruction_ptr->m_Word2.val, SQ_ENDIAN_NONE,
+ EG_VTX_WORD2__ENDIAN_SWAP_shift,
+ EG_VTX_WORD2__ENDIAN_SWAP_mask);
+ SETfield(vfetch_instruction_ptr->m_Word2.val, 0,
+ EG_VTX_WORD2__CBNS_shift,
+ EG_VTX_WORD2__CBNS_bit);
+ SETfield(vfetch_instruction_ptr->m_Word2.val, is_mega_fetch_flag,
+ EG_VTX_WORD2__MEGA_FETCH_shift,
+ EG_VTX_WORD2__MEGA_FETCH_mask);
+
+ if (assembled_vfetch_instruction_ptr == NULL)
+ {
+ if ( GL_FALSE == add_vfetch_instruction(pAsm, (R700VertexInstruction *)vfetch_instruction_ptr) )
+ {
+ return GL_FALSE;
+ }
+
+ if (pAsm->vfetch_instruction_ptr_array[element] != NULL)
+ {
+ return GL_FALSE;
+ }
+ else
+ {
+ pAsm->vfetch_instruction_ptr_array[element] = vfetch_instruction_ptr;
+ }
+ }
+
+ return GL_TRUE;
+}
+
GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
GLuint destination_register,
GLenum type,
@@ -1619,19 +1941,68 @@ GLboolean assemble_tex_instruction(r700_AssemblerBase *pAsm, GLboolean normalize
texture_coordinate_source = &(pAsm->S[0].src);
texture_unit_source = &(pAsm->S[1].src);
- tex_instruction_ptr->m_Word0.f.tex_inst = pAsm->D.dst.opcode;
- tex_instruction_ptr->m_Word0.f.bc_frac_mode = 0x0;
- tex_instruction_ptr->m_Word0.f.fetch_whole_quad = 0x0;
- tex_instruction_ptr->m_Word0.f.alt_const = 0;
-
- if(SPT_VP == pAsm->currentShaderType)
+ if(8 == pAsm->unAsic) /* evergreen */
{
- tex_instruction_ptr->m_Word0.f.resource_id = texture_unit_source->reg + VERT_ATTRIB_MAX;
- pAsm->unVetTexBits |= 1 << texture_unit_source->reg;
+
+ SETfield(tex_instruction_ptr->m_Word0.val, pAsm->D.dst.opcode,
+ EG_TEX_WORD0__TEX_INST_shift,
+ EG_TEX_WORD0__TEX_INST_mask);
+
+ if( (SQ_TEX_INST_GET_GRADIENTS_H == pAsm->D.dst.opcode)
+ ||(SQ_TEX_INST_GET_GRADIENTS_V == pAsm->D.dst.opcode) )
+ {
+ /* Use fine texel derivative calculation rather than use quad derivative */
+ SETfield(tex_instruction_ptr->m_Word0.val, 1,
+ EG_TEX_WORD0__INST_MOD_shift,
+ EG_TEX_WORD0__INST_MOD_mask);
+ }
+ else
+ {
+ SETfield(tex_instruction_ptr->m_Word0.val, 0,
+ EG_TEX_WORD0__INST_MOD_shift,
+ EG_TEX_WORD0__INST_MOD_mask);
+ }
+
+ CLEARbit(tex_instruction_ptr->m_Word0.val, EG_TEX_WORD0__FWQ_bit);
+
+ if(SPT_VP == pAsm->currentShaderType)
+ {
+ SETfield(tex_instruction_ptr->m_Word0.val, (texture_unit_source->reg + VERT_ATTRIB_MAX),
+ EG_TEX_WORD0__RESOURCE_ID_shift,
+ EG_TEX_WORD0__RESOURCE_ID_mask);
+ pAsm->unVetTexBits |= 1 << texture_unit_source->reg;
+ }
+ else
+ {
+ SETfield(tex_instruction_ptr->m_Word0.val, texture_unit_source->reg,
+ EG_TEX_WORD0__RESOURCE_ID_shift,
+ EG_TEX_WORD0__RESOURCE_ID_mask);
+ }
+
+ CLEARbit(tex_instruction_ptr->m_Word0.val, EG_TEX_WORD0__ALT_CONST_bit);
+ SETfield(tex_instruction_ptr->m_Word0.val, 0,
+ EG_TEX_WORD0__RIM_shift,
+ EG_TEX_WORD0__RIM_mask);
+ SETfield(tex_instruction_ptr->m_Word0.val, 0,
+ EG_TEX_WORD0__SIM_shift,
+ EG_TEX_WORD0__SIM_mask);
}
else
{
- tex_instruction_ptr->m_Word0.f.resource_id = texture_unit_source->reg;
+ tex_instruction_ptr->m_Word0.f.tex_inst = pAsm->D.dst.opcode;
+ tex_instruction_ptr->m_Word0.f.bc_frac_mode = 0x0;
+ tex_instruction_ptr->m_Word0.f.fetch_whole_quad = 0x0;
+ tex_instruction_ptr->m_Word0.f.alt_const = 0;
+
+ if(SPT_VP == pAsm->currentShaderType)
+ {
+ tex_instruction_ptr->m_Word0.f.resource_id = texture_unit_source->reg + VERT_ATTRIB_MAX;
+ pAsm->unVetTexBits |= 1 << texture_unit_source->reg;
+ }
+ else
+ {
+ tex_instruction_ptr->m_Word0.f.resource_id = texture_unit_source->reg;
+ }
}
tex_instruction_ptr->m_Word1.f.lod_bias = 0x0;
@@ -1657,8 +2028,20 @@ GLboolean assemble_tex_instruction(r700_AssemblerBase *pAsm, GLboolean normalize
if ( (pAsm->D.dst.rtype == DST_REG_TEMPORARY) ||
(pAsm->D.dst.rtype == DST_REG_OUT) )
{
- tex_instruction_ptr->m_Word0.f.src_gpr = texture_coordinate_source->reg;
- tex_instruction_ptr->m_Word0.f.src_rel = SQ_ABSOLUTE;
+ if(8 == pAsm->unAsic) /* evergreen */
+ {
+ SETfield(tex_instruction_ptr->m_Word0.val, texture_coordinate_source->reg,
+ EG_TEX_WORD0__SRC_GPR_shift,
+ EG_TEX_WORD0__SRC_GPR_mask);
+ SETfield(tex_instruction_ptr->m_Word0.val, SQ_ABSOLUTE,
+ EG_TEX_WORD0__SRC_REL_shift,
+ EG_TEX_WORD0__SRC_REL_bit);
+ }
+ else
+ {
+ tex_instruction_ptr->m_Word0.f.src_gpr = texture_coordinate_source->reg;
+ tex_instruction_ptr->m_Word0.f.src_rel = SQ_ABSOLUTE;
+ }
tex_instruction_ptr->m_Word1.f.dst_gpr = pAsm->D.dst.reg;
tex_instruction_ptr->m_Word1.f.dst_rel = SQ_ABSOLUTE;
@@ -1709,7 +2092,8 @@ void initialize(r700_AssemblerBase *pAsm)
GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr,
int source_index,
PVSSRC* pSource,
- BITS scalar_channel_index)
+ BITS scalar_channel_index,
+ r700_AssemblerBase *pAsm)
{
BITS src_sel;
BITS src_rel;
@@ -1765,7 +2149,16 @@ GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr,
}
else if (pSource->rtype == SRC_REG_CONSTANT)
{
- src_sel = pSource->reg + CFILE_REGISTER_OFFSET;
+ /* TODO : 4 const buffers */
+ if(GL_TRUE == pAsm->bUseMemConstant)
+ {
+ src_sel = pSource->reg + SQ_ALU_SRC_KCACHE0_BASE;
+ pAsm->kcacheUsed = SQ_ALU_SRC_KCACHE0_BASE;
+ }
+ else
+ {
+ src_sel = pSource->reg + CFILE_REGISTER_OFFSET;
+ }
}
else if (pSource->rtype == SRC_REC_LITERAL)
{
@@ -1915,6 +2308,17 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,
pAsm->cf_current_alu_clause_ptr->m_Word1.f.count += (GetInstructionSize(alu_instruction_ptr->m_ShaderInstType) / 2);
}
+ /* TODO : handle 4 bufs */
+ if( (pAsm->kcacheUsed > 0) && (GL_TRUE == pAsm->bUseMemConstant) )
+ {
+ pAsm->cf_current_alu_clause_ptr->m_Word0.f.kcache_bank0 = 0x0;
+ pAsm->cf_current_alu_clause_ptr->m_Word0.f.kcache_bank1 = 0x0;
+ pAsm->cf_current_alu_clause_ptr->m_Word0.f.kcache_mode0 = SQ_CF_KCACHE_LOCK_2;
+ pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_mode1 = SQ_CF_KCACHE_NOP;
+ pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr0 = 0x0;
+ pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr1 = 0x0;
+ }
+
// If this clause constains any instruction that is forward dependent on a TEX instruction,
// set the whole_quad_mode for this clause
if ( pAsm->pInstDeps[pAsm->uiCurInst].nDstDep > (-1) )
@@ -1938,6 +2342,80 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,
return GL_TRUE;
}
+GLboolean EG_add_ps_interp(r700_AssemblerBase* pAsm)
+{
+ R700ALUInstruction * alu_instruction_ptr = NULL;
+
+ int ui;
+ unsigned int uj;
+ unsigned int unWord0Temp = 0x380C00;
+ unsigned int unWord1Temp = 0x146B10; //SQ_SEL_X
+
+ if(pAsm->uIIns > 0)
+ {
+ for(ui=(pAsm->uIIns-1); ui>=0; ui--)
+ {
+ for(uj=0; uj<8; uj++)
+ {
+ alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction);
+ Init_R700ALUInstruction(alu_instruction_ptr);
+ alu_instruction_ptr->m_Word0.val = unWord0Temp;
+ alu_instruction_ptr->m_Word1.val = unWord1Temp;
+
+ if(uj < 4)
+ {
+ SETfield(alu_instruction_ptr->m_Word1.val, EG_OP2_INST_INTERP_ZW,
+ EG_ALU_WORD1_OP2__ALU_INST_shift, EG_ALU_WORD1_OP2__ALU_INST_mask);
+ }
+ else
+ {
+ SETfield(alu_instruction_ptr->m_Word1.val, EG_OP2_INST_INTERP_XY,
+ EG_ALU_WORD1_OP2__ALU_INST_shift, EG_ALU_WORD1_OP2__ALU_INST_mask);
+ }
+ if( (uj > 1) && (uj < 6) )
+ {
+ SETfield(alu_instruction_ptr->m_Word1.val, 1,
+ EG_ALU_WORD1_OP2__WRITE_MASK_shift, EG_ALU_WORD1_OP2__WRITE_MASK_bit);
+ }
+ else
+ {
+ SETfield(alu_instruction_ptr->m_Word1.val, 0,
+ EG_ALU_WORD1_OP2__WRITE_MASK_shift, EG_ALU_WORD1_OP2__WRITE_MASK_bit);
+ }
+ if( (uj > 1) && (uj < 6) )
+ {
+ SETfield(alu_instruction_ptr->m_Word1.val, ui,
+ EG_ALU_WORD1__DST_GPR_shift, EG_ALU_WORD1__DST_GPR_mask);
+ }
+ else
+ {
+ SETfield(alu_instruction_ptr->m_Word1.val, 111,
+ EG_ALU_WORD1__DST_GPR_shift, EG_ALU_WORD1__DST_GPR_mask);
+ }
+
+ SETfield(alu_instruction_ptr->m_Word1.val, (uj % 4),
+ EG_ALU_WORD1__DST_CHAN_shift, EG_ALU_WORD1__DST_CHAN_mask);
+ SETfield(alu_instruction_ptr->m_Word0.val, (1 - (uj % 2)),
+ EG_ALU_WORD0__SRC0_CHAN_shift, EG_ALU_WORD0__SRC0_CHAN_mask);
+ SETfield(alu_instruction_ptr->m_Word0.val, (EG_ALU_SRC_PARAM_BASE + ui),
+ EG_ALU_WORD0__SRC1_SEL_shift, EG_ALU_WORD0__SRC1_SEL_mask);
+ if(3 == (uj % 4))
+ {
+ SETfield(alu_instruction_ptr->m_Word0.val, 1,
+ EG_ALU_WORD0__LAST_shift, EG_ALU_WORD0__LAST_bit);
+ }
+
+ if(GL_FALSE == add_alu_instruction(pAsm, alu_instruction_ptr, 4) )
+ {
+ return GL_FALSE;
+ }
+ }
+ }
+ }
+
+ return GL_TRUE;
+}
+
void get_src_properties(R700ALUInstruction* alu_instruction_ptr,
int source_index,
BITS* psrc_sel,
@@ -2188,8 +2666,16 @@ GLboolean check_scalar(r700_AssemblerBase* pAsm,
BITS src_neg [3] = {0,0,0};
GLuint swizzle_key;
+ GLuint number_of_operands;
- GLuint number_of_operands = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ if(8 == pAsm->unAsic)
+ {
+ number_of_operands = EG_GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ }
+ else
+ {
+ number_of_operands = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ }
for (src=0; src<number_of_operands; src++)
{
@@ -2277,8 +2763,16 @@ GLboolean check_vector(r700_AssemblerBase* pAsm,
BITS src_neg [3] = {0,0,0};
GLuint swizzle_key;
+ GLuint number_of_operands;
- GLuint number_of_operands = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ if(8 == pAsm->unAsic)
+ {
+ number_of_operands = EG_GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ }
+ else
+ {
+ number_of_operands = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ }
for (src=0; src<number_of_operands; src++)
{
@@ -2358,12 +2852,23 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
PVSSRC * pcurrent_source;
int current_source_index;
GLuint contiguous_slots_needed;
+ GLuint uNumSrc;
+ GLboolean bSplitInst;
+
+ if(8 == pAsm->unAsic)
+ {
+ uNumSrc = EG_GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ }
+ else
+ {
+ uNumSrc = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
+ }
- GLuint uNumSrc = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3);
//GLuint channel_swizzle, j;
//GLuint chan_counter[4] = {0, 0, 0, 0};
//PVSSRC * pSource[3];
- GLboolean bSplitInst = GL_FALSE;
+ bSplitInst = GL_FALSE;
+ pAsm->kcacheUsed = 0;
if (1 == pAsm->D.dst.math)
{
@@ -2462,7 +2967,8 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
if (GL_FALSE == assemble_alu_src(alu_instruction_ptr,
current_source_index,
pcurrent_source,
- scalar_channel_index) )
+ scalar_channel_index,
+ pAsm) )
{
return GL_FALSE;
}
@@ -2476,7 +2982,8 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
if (GL_FALSE == assemble_alu_src(alu_instruction_ptr,
current_source_index,
pcurrent_source,
- scalar_channel_index) )
+ scalar_channel_index,
+ pAsm) )
{
return GL_FALSE;
}
@@ -2559,7 +3066,8 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
if ( GL_FALSE == assemble_alu_src(alu_instruction_ptr,
current_source_index,
pcurrent_source,
- scalar_channel_index) )
+ scalar_channel_index,
+ pAsm) )
{
return GL_FALSE;
}
@@ -3000,7 +3508,14 @@ GLboolean assemble_DOT(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP2_INST_DOT4;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_DOT4;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_DOT4;
+ }
if( GL_FALSE == assemble_dst(pAsm) )
{
@@ -3082,6 +3597,11 @@ GLboolean assemble_DST(r700_AssemblerBase *pAsm)
GLboolean assemble_EX2(r700_AssemblerBase *pAsm)
{
+ if(8 == pAsm->unAsic)
+ {
+ return assemble_math_function(pAsm, EG_OP2_INST_EXP_IEEE);
+ }
+
return assemble_math_function(pAsm, SQ_OP2_INST_EXP_IEEE);
}
@@ -3114,7 +3634,14 @@ GLboolean assemble_EXP(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_EXP_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ }
pAsm->D.dst.math = 1;
if( GL_FALSE == assemble_dst(pAsm) )
@@ -3163,7 +3690,14 @@ GLboolean assemble_EXP(r700_AssemblerBase *pAsm)
// EX2 dst.z, a.x
if ((pAsm->pILInst->DstReg.WriteMask >> 2) & 0x1) {
- pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_EXP_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ }
pAsm->D.dst.math = 1;
if( GL_FALSE == assemble_dst(pAsm) )
@@ -3238,6 +3772,11 @@ GLboolean assemble_FLR(r700_AssemblerBase *pAsm)
GLboolean assemble_FLR_INT(r700_AssemblerBase *pAsm)
{
+ if(8 == pAsm->unAsic)
+ {
+ return assemble_math_function(pAsm, EG_OP2_INST_FLT_TO_INT);
+ }
+
return assemble_math_function(pAsm, SQ_OP2_INST_FLT_TO_INT);
}
@@ -3320,6 +3859,11 @@ GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode)
GLboolean assemble_LG2(r700_AssemblerBase *pAsm)
{
+ if(8 == pAsm->unAsic)
+ {
+ return assemble_math_function(pAsm, EG_OP2_INST_LOG_IEEE);
+ }
+
return assemble_math_function(pAsm, SQ_OP2_INST_LOG_IEEE);
}
@@ -3359,7 +3903,14 @@ GLboolean assemble_LRP(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP3_INST_MULADD;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ }
pAsm->D.dst.op3 = 1;
pAsm->D.dst.rtype = DST_REG_TEMPORARY;
@@ -3457,7 +4008,14 @@ GLboolean assemble_LOG(r700_AssemblerBase *pAsm)
// LG2 tmp2.x, tmp1.x
// FLOOR tmp3.x, tmp2.x
- pAsm->D.dst.opcode = SQ_OP2_INST_LOG_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_LOG_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_LOG_IEEE;
+ }
pAsm->D.dst.math = 1;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
@@ -3548,7 +4106,14 @@ GLboolean assemble_LOG(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_EXP_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ }
pAsm->D.dst.math = 1;
if( GL_FALSE == assemble_dst(pAsm) )
@@ -3630,7 +4195,14 @@ GLboolean assemble_MAD(struct r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP3_INST_MULADD;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ }
pAsm->D.dst.op3 = 1;
tmp = (-1);
@@ -3798,7 +4370,14 @@ GLboolean assemble_LIT(r700_AssemblerBase *pAsm)
swizzleagain_PVSSRC(&(pAsm->S[0].src), SQ_SEL_Y, SQ_SEL_Y, SQ_SEL_Y, SQ_SEL_Y);
/* dst.z = log(src.y) */
- pAsm->D.dst.opcode = SQ_OP2_INST_LOG_CLAMPED;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_LOG_CLAMPED;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_LOG_CLAMPED;
+ }
pAsm->D.dst.math = 1;
pAsm->D.dst.rtype = dstType;
pAsm->D.dst.reg = dstReg;
@@ -3862,7 +4441,14 @@ GLboolean assemble_LIT(r700_AssemblerBase *pAsm)
}
/* dst.z = exp(tmp.x) */
- pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_EXP_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ }
pAsm->D.dst.math = 1;
pAsm->D.dst.rtype = dstType;
pAsm->D.dst.reg = dstReg;
@@ -4017,7 +4603,14 @@ GLboolean assemble_POW(r700_AssemblerBase *pAsm)
tmp = gethelpr(pAsm);
// LG2 tmp.x, a.swizzle
- pAsm->D.dst.opcode = SQ_OP2_INST_LOG_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_LOG_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_LOG_IEEE;
+ }
pAsm->D.dst.math = 1;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
@@ -4061,7 +4654,14 @@ GLboolean assemble_POW(r700_AssemblerBase *pAsm)
// EX2 dst.mask, tmp.x
// EX2 tmp.x, tmp.x
- pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_EXP_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_EXP_IEEE;
+ }
pAsm->D.dst.math = 1;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
@@ -4105,11 +4705,21 @@ GLboolean assemble_POW(r700_AssemblerBase *pAsm)
GLboolean assemble_RCP(r700_AssemblerBase *pAsm)
{
+ if(8 == pAsm->unAsic)
+ {
+ return assemble_math_function(pAsm, EG_OP2_INST_RECIP_IEEE);
+ }
+
return assemble_math_function(pAsm, SQ_OP2_INST_RECIP_IEEE);
}
GLboolean assemble_RSQ(r700_AssemblerBase *pAsm)
{
+ if(8 == pAsm->unAsic)
+ {
+ return assemble_math_function(pAsm, EG_OP2_INST_RECIPSQRT_IEEE);
+ }
+
return assemble_math_function(pAsm, SQ_OP2_INST_RECIPSQRT_IEEE);
}
@@ -4195,7 +4805,14 @@ GLboolean assemble_SCS(r700_AssemblerBase *pAsm)
}
// COS dst.x, a.x
- pAsm->D.dst.opcode = SQ_OP2_INST_COS;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_COS;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_COS;
+ }
pAsm->D.dst.math = 1;
assemble_dst(pAsm);
@@ -4214,7 +4831,14 @@ GLboolean assemble_SCS(r700_AssemblerBase *pAsm)
}
// SIN dst.y, a.x
- pAsm->D.dst.opcode = SQ_OP2_INST_SIN;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_SIN;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_SIN;
+ }
pAsm->D.dst.math = 1;
assemble_dst(pAsm);
@@ -4466,7 +5090,14 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
if (pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXP)
{
GLuint tmp = gethelpr(pAsm);
- pAsm->D.dst.opcode = SQ_OP2_INST_RECIP_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_RECIP_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_RECIP_IEEE;
+ }
pAsm->D.dst.math = 1;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
pAsm->D.dst.rtype = DST_REG_TEMPORARY;
@@ -4516,7 +5147,14 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
GLuint tmp2 = gethelpr(pAsm);
/* tmp1.xyzw = CUBE(R0.zzxy, R0.yxzz) */
- pAsm->D.dst.opcode = SQ_OP2_INST_CUBE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_CUBE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_CUBE;
+ }
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
pAsm->D.dst.rtype = DST_REG_TEMPORARY;
pAsm->D.dst.reg = tmp1;
@@ -4541,7 +5179,14 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
}
/* tmp1.z = RCP_e(|tmp1.z|) */
- pAsm->D.dst.opcode = SQ_OP2_INST_RECIP_IEEE;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP2_INST_RECIP_IEEE;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP2_INST_RECIP_IEEE;
+ }
pAsm->D.dst.math = 1;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
pAsm->D.dst.rtype = DST_REG_TEMPORARY;
@@ -4560,7 +5205,14 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
* MULADD R0.y, R0.y, PS1, (0x3FC00000, 1.5f).x
* muladd has no writemask, have to use another temp
*/
- pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP3_INST_MULADD;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ }
pAsm->D.dst.op3 = 1;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
pAsm->D.dst.rtype = DST_REG_TEMPORARY;
@@ -4747,7 +5399,14 @@ GLboolean assemble_XPD(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ if(8 == pAsm->unAsic)
+ {
+ pAsm->D.dst.opcode = EG_OP3_INST_MULADD;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_OP3_INST_MULADD;
+ }
pAsm->D.dst.op3 = 1;
if(0xF != pAsm->pILInst[pAsm->uiCurInst].DstReg.WriteMask)
@@ -4904,16 +5563,49 @@ GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset)
return GL_FALSE;
}
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_JUMP,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ pops,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + offset;
@@ -4927,17 +5619,50 @@ GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops)
return GL_FALSE;
}
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_POP,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ pops,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
return GL_TRUE;
@@ -4955,23 +5680,66 @@ GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse)
return GL_FALSE;
}
- if(GL_TRUE != bHasElse)
- {
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ if(8 == pAsm->unAsic)
+ {
+ if(GL_TRUE != bHasElse)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ }
+ else
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ }
+
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_JUMP,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
}
else
{
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
- }
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(GL_TRUE != bHasElse)
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ }
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->FCSP++;
pAsm->fc_stack[pAsm->FCSP].type = FC_IF;
@@ -4998,16 +5766,49 @@ GLboolean assemble_ELSE(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; ///
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_ELSE,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; ///
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ELSE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ELSE;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->fc_stack[pAsm->FCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc( (void *)pAsm->fc_stack[pAsm->FCSP].mid,
0,
@@ -5067,17 +5868,49 @@ GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
-
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_LOOP_START_NO_AL,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_START_NO_AL;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_START_NO_AL;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->FCSP++;
pAsm->fc_stack[pAsm->FCSP].type = FC_LOOP;
@@ -5118,18 +5951,50 @@ GLboolean assemble_BRK(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
-
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_LOOP_BREAK,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(
(void *)pAsm->fc_stack[unFCSP].mid,
@@ -5143,18 +6008,52 @@ GLboolean assemble_BRK(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_POP,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
- pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
+
+ pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE);
@@ -5188,18 +6087,50 @@ GLboolean assemble_CONT(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
-
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_LOOP_CONTINUE,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_CONTINUE;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_CONTINUE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(
(void *)pAsm->fc_stack[unFCSP].mid,
@@ -5213,17 +6144,51 @@ GLboolean assemble_CONT(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_POP,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE);
@@ -5242,17 +6207,49 @@ GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
-
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_LOOP_END,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_END;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_END;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->fc_stack[pAsm->FCSP].first->m_uIndex + 1;
pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1;
@@ -5314,17 +6311,51 @@ void add_return_inst(r700_AssemblerBase *pAsm)
{
return;
}
- //pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_RETURN;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_RETURN,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ //pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_RETURN;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
}
GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex, GLuint uiIL_Shift)
@@ -5447,17 +6478,50 @@ GLboolean assemble_CAL(r700_AssemblerBase *pAsm,
return GL_FALSE;
}
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.call_count = 1;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_CALL,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.call_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_CALL;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_CALL;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
/* Put in caller */
if( (pAsm->unCallerArrayPointer + 1) > pAsm->unCallerArraySize )
@@ -5658,16 +6722,49 @@ GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP)
return GL_FALSE;
}
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__POP_COUNT_shift, EG_CF_WORD1__POP_COUNT_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ EG_CF_INST_LOOP_BREAK,
+ EG_CF_WORD1__CF_INST_shift, EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__CF_CONST_shift, EG_CF_WORD1__CF_CONST_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ SQ_CF_COND_ACTIVE,
+ EG_CF_WORD1__COND_shift, EG_CF_WORD1__COND_mask);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__EOP_shift, EG_CF_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__VPM_shift, EG_CF_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_WORD1__WQM_shift, EG_CF_WORD1__WQM_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__BARRIER_shift, EG_CF_WORD1__BARRIER_bit);
+ SETfield(pAsm->cf_current_cf_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_WORD1__COUNT_shift, EG_CF_WORD1__COUNT_mask);
+ }
+ else
+ {
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(
(void *)pAsm->fc_stack[unFCSP].mid,
@@ -5756,8 +6853,16 @@ GLboolean AssembleInstr(GLuint uiFirstInst,
return GL_FALSE;
break;
case OPCODE_COS:
- if ( GL_FALSE == assemble_TRIG(pR700AsmCode, SQ_OP2_INST_COS) )
- return GL_FALSE;
+ if(8 == pR700AsmCode->unAsic)
+ {
+ if ( GL_FALSE == assemble_TRIG(pR700AsmCode, EG_OP2_INST_COS) )
+ return GL_FALSE;
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_TRIG(pR700AsmCode, SQ_OP2_INST_COS) )
+ return GL_FALSE;
+ }
break;
case OPCODE_DP2:
@@ -5874,8 +6979,16 @@ GLboolean AssembleInstr(GLuint uiFirstInst,
return GL_FALSE;
break;
case OPCODE_SIN:
- if ( GL_FALSE == assemble_TRIG(pR700AsmCode, SQ_OP2_INST_SIN) )
- return GL_FALSE;
+ if(8 == pR700AsmCode->unAsic)
+ {
+ if ( GL_FALSE == assemble_TRIG(pR700AsmCode, EG_OP2_INST_SIN) )
+ return GL_FALSE;
+ }
+ else
+ {
+ if ( GL_FALSE == assemble_TRIG(pR700AsmCode, SQ_OP2_INST_SIN) )
+ return GL_FALSE;
+ }
break;
case OPCODE_SCS:
if ( GL_FALSE == assemble_SCS(pR700AsmCode) )
@@ -6103,7 +7216,15 @@ GLboolean AssembleInstr(GLuint uiFirstInst,
GLboolean InitShaderProgram(r700_AssemblerBase * pAsm)
{
+#ifndef GENERATE_SHADER_FOR_2D
setRetInLoopFlag(pAsm, SQ_SEL_0);
+#endif
+
+ if((SPT_FP == pAsm->currentShaderType) && (8 == pAsm->unAsic))
+ {
+ EG_add_ps_interp(pAsm);
+ }
+
pAsm->alu_x_opcode = SQ_CF_INST_ALU;
return GL_TRUE;
}
@@ -6126,6 +7247,7 @@ GLboolean RelocProgram(r700_AssemblerBase * pAsm, struct gl_program * pILProg)
plstCFmain = pAsm->CALLSTACK[0].plstCFInstructions_local;
+#ifndef GENERATE_SHADER_FOR_2D
/* remove flags init if they are not used */
if((pAsm->unCFflags & HAS_LOOPRET) == 0)
{
@@ -6156,6 +7278,7 @@ GLboolean RelocProgram(r700_AssemblerBase * pAsm, struct gl_program * pILProg)
pInst = pInst->pNextInst;
};
}
+#endif /* GENERATE_SHADER_FOR_2D */
if(pAsm->CALLSTACK[0].max > 0)
{
@@ -6262,13 +7385,20 @@ GLboolean RelocProgram(r700_AssemblerBase * pAsm, struct gl_program * pILProg)
}
else
{
- if(pAsm->bR6xx)
+ if(8 == pAsm->unAsic)
{
- uNumSrc = r700GetNumOperands(pALU->m_Word1_OP2.f6.alu_inst, 0);
+ uNumSrc = EG_GetNumOperands(pALU->m_Word1_OP2.f.alu_inst, 0);
}
else
{
- uNumSrc = r700GetNumOperands(pALU->m_Word1_OP2.f.alu_inst, 0);
+ if(pAsm->bR6xx)
+ {
+ uNumSrc = r700GetNumOperands(pALU->m_Word1_OP2.f6.alu_inst, 0);
+ }
+ else
+ {
+ uNumSrc = r700GetNumOperands(pALU->m_Word1_OP2.f.alu_inst, 0);
+ }
}
if(2 == uNumSrc)
{ /* 2 srcs */
@@ -6559,12 +7689,42 @@ GLboolean Process_Export(r700_AssemblerBase* pAsm,
pAsm->cf_current_export_clause_ptr->m_Word0.f.index_gpr = 0x0;
pAsm->cf_current_export_clause_ptr->m_Word0.f.elem_size = 0x3;
- pAsm->cf_current_export_clause_ptr->m_Word1.f.burst_count = (export_count - 1);
- pAsm->cf_current_export_clause_ptr->m_Word1.f.end_of_program = 0x0;
- pAsm->cf_current_export_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
- pAsm->cf_current_export_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT; // _DONE
- pAsm->cf_current_export_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
- pAsm->cf_current_export_clause_ptr->m_Word1.f.barrier = 0x1;
+ if(8 == pAsm->unAsic)
+ {
+ SETfield(pAsm->cf_current_export_clause_ptr->m_Word1.val,
+ (export_count - 1),
+ EG_CF_ALLOC_EXPORT_WORD1__BURST_COUNT_shift,
+ EG_CF_ALLOC_EXPORT_WORD1__BURST_COUNT_mask);
+ SETfield(pAsm->cf_current_export_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_ALLOC_EXPORT_WORD1__EOP_shift,
+ EG_CF_ALLOC_EXPORT_WORD1__EOP_bit);
+ SETfield(pAsm->cf_current_export_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_ALLOC_EXPORT_WORD1__VPM_shift,
+ EG_CF_ALLOC_EXPORT_WORD1__VPM_bit);
+ SETfield(pAsm->cf_current_export_clause_ptr->m_Word1.val,
+ EG_CF_INST_EXPORT,
+ EG_CF_WORD1__CF_INST_shift,
+ EG_CF_WORD1__CF_INST_mask);
+ SETfield(pAsm->cf_current_export_clause_ptr->m_Word1.val,
+ 0,
+ EG_CF_ALLOC_EXPORT_WORD1__MARK_shift,
+ EG_CF_ALLOC_EXPORT_WORD1__MARK_bit);
+ SETfield(pAsm->cf_current_export_clause_ptr->m_Word1.val,
+ 1,
+ EG_CF_ALLOC_EXPORT_WORD1__BARRIER_shift,
+ EG_CF_ALLOC_EXPORT_WORD1__BARRIER_bit);
+ }
+ else
+ {
+ pAsm->cf_current_export_clause_ptr->m_Word1.f.burst_count = (export_count - 1);
+ pAsm->cf_current_export_clause_ptr->m_Word1.f.end_of_program = 0x0;
+ pAsm->cf_current_export_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;
+ pAsm->cf_current_export_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT; // _DONE
+ pAsm->cf_current_export_clause_ptr->m_Word1.f.whole_quad_mode = 0x0;
+ pAsm->cf_current_export_clause_ptr->m_Word1.f.barrier = 0x1;
+ }
if (export_count == 1)
{
@@ -6692,8 +7852,22 @@ GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode,
if(pR700AsmCode->cf_last_export_ptr != NULL)
{
- pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
- pR700AsmCode->cf_last_export_ptr->m_Word1.f.end_of_program = 0x1;
+ if(8 == pR700AsmCode->unAsic)
+ {
+ SETfield(pR700AsmCode->cf_last_export_ptr->m_Word1.val,
+ 1,
+ EG_CF_ALLOC_EXPORT_WORD1__EOP_shift,
+ EG_CF_ALLOC_EXPORT_WORD1__EOP_bit);
+ SETfield(pR700AsmCode->cf_last_export_ptr->m_Word1.val,
+ EG_CF_INST_EXPORT_DONE,
+ EG_CF_WORD1__CF_INST_shift,
+ EG_CF_WORD1__CF_INST_mask);
+ }
+ else
+ {
+ pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
+ pR700AsmCode->cf_last_export_ptr->m_Word1.f.end_of_program = 0x1;
+ }
}
return GL_TRUE;
@@ -6739,7 +7913,17 @@ GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode,
export_count--;
}
- pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
+ if(8 == pR700AsmCode->unAsic)
+ {
+ SETfield(pR700AsmCode->cf_last_export_ptr->m_Word1.val,
+ EG_CF_INST_EXPORT_DONE,
+ EG_CF_WORD1__CF_INST_shift,
+ EG_CF_WORD1__CF_INST_mask);
+ }
+ else
+ {
+ pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
+ }
pR700AsmCode->number_of_exports = export_count;
@@ -6834,7 +8018,17 @@ GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode,
// At least one param should be exported
if (export_count)
{
- pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
+ if(8 == pR700AsmCode->unAsic)
+ {
+ SETfield(pR700AsmCode->cf_last_export_ptr->m_Word1.val,
+ EG_CF_INST_EXPORT_DONE,
+ EG_CF_WORD1__CF_INST_shift,
+ EG_CF_WORD1__CF_INST_mask);
+ }
+ else
+ {
+ pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
+ }
}
else
{
@@ -6852,7 +8046,17 @@ GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode,
pR700AsmCode->cf_last_export_ptr->m_Word1_SWIZ.f.sel_y = SQ_SEL_0;
pR700AsmCode->cf_last_export_ptr->m_Word1_SWIZ.f.sel_z = SQ_SEL_0;
pR700AsmCode->cf_last_export_ptr->m_Word1_SWIZ.f.sel_w = SQ_SEL_1;
- pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
+ if(8 == pR700AsmCode->unAsic)
+ {
+ SETfield(pR700AsmCode->cf_last_export_ptr->m_Word1.val,
+ EG_CF_INST_EXPORT_DONE,
+ EG_CF_WORD1__CF_INST_shift,
+ EG_CF_WORD1__CF_INST_mask);
+ }
+ else
+ {
+ pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;
+ }
}
pR700AsmCode->cf_last_export_ptr->m_Word1.f.end_of_program = 0x1;
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-26 16:45:39 +0000