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Diffstat (limited to 'src/intel/compiler/test_eu_validate.cpp')
-rw-r--r--src/intel/compiler/test_eu_validate.cpp132
1 files changed, 66 insertions, 66 deletions
diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp
index 185ceb900f6..08197f21395 100644
--- a/src/intel/compiler/test_eu_validate.cpp
+++ b/src/intel/compiler/test_eu_validate.cpp
@@ -152,7 +152,7 @@ TEST_P(validation_test, src1_null_reg)
TEST_P(validation_test, math_src0_null_reg)
{
- if (devinfo.gen >= 6) {
+ if (devinfo.ver >= 6) {
gen6_math(p, g0, BRW_MATH_FUNCTION_SIN, null, null);
} else {
gen4_math(p, g0, BRW_MATH_FUNCTION_SIN, 0, null, BRW_MATH_PRECISION_FULL);
@@ -163,7 +163,7 @@ TEST_P(validation_test, math_src0_null_reg)
TEST_P(validation_test, math_src1_null_reg)
{
- if (devinfo.gen >= 6) {
+ if (devinfo.ver >= 6) {
gen6_math(p, g0, BRW_MATH_FUNCTION_POW, g0, null);
EXPECT_FALSE(validate(p));
} else {
@@ -182,7 +182,7 @@ TEST_P(validation_test, opcode46)
*/
brw_next_insn(p, brw_opcode_decode(&devinfo, 46));
- if (devinfo.gen == 7) {
+ if (devinfo.ver == 7) {
EXPECT_FALSE(validate(p));
} else {
EXPECT_TRUE(validate(p));
@@ -232,13 +232,13 @@ TEST_P(validation_test, invalid_exec_size_encoding)
TEST_P(validation_test, invalid_file_encoding)
{
/* Register file on Gen12 is only one bit */
- if (devinfo.gen >= 12)
+ if (devinfo.ver >= 12)
return;
brw_MOV(p, g0, g0);
brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_MESSAGE_REGISTER_FILE, BRW_REGISTER_TYPE_F);
- if (devinfo.gen > 6) {
+ if (devinfo.ver > 6) {
EXPECT_FALSE(validate(p));
} else {
EXPECT_TRUE(validate(p));
@@ -246,14 +246,14 @@ TEST_P(validation_test, invalid_file_encoding)
clear_instructions(p);
- if (devinfo.gen < 6) {
+ if (devinfo.ver < 6) {
gen4_math(p, g0, BRW_MATH_FUNCTION_SIN, 0, g0, BRW_MATH_PRECISION_FULL);
} else {
gen6_math(p, g0, BRW_MATH_FUNCTION_SIN, g0, null);
}
brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_MESSAGE_REGISTER_FILE, BRW_REGISTER_TYPE_F);
- if (devinfo.gen > 6) {
+ if (devinfo.ver > 6) {
EXPECT_FALSE(validate(p));
} else {
EXPECT_TRUE(validate(p));
@@ -269,7 +269,7 @@ TEST_P(validation_test, invalid_type_encoding)
for (unsigned i = 0; i < ARRAY_SIZE(files); i++) {
const enum brw_reg_file file = files[i];
- const int num_bits = devinfo.gen >= 8 ? 4 : 3;
+ const int num_bits = devinfo.ver >= 8 ? 4 : 3;
const int num_encodings = 1 << num_bits;
/* The data types are encoded into <num_bits> bits to be used in hardware
@@ -282,10 +282,10 @@ TEST_P(validation_test, invalid_type_encoding)
enum brw_reg_type type;
bool expected_result;
} test_case[] = {
- { BRW_REGISTER_TYPE_NF, devinfo.gen == 11 && file != IMM },
- { BRW_REGISTER_TYPE_DF, devinfo.has_64bit_float && (devinfo.gen >= 8 || file != IMM) },
+ { BRW_REGISTER_TYPE_NF, devinfo.ver == 11 && file != IMM },
+ { BRW_REGISTER_TYPE_DF, devinfo.has_64bit_float && (devinfo.ver >= 8 || file != IMM) },
{ BRW_REGISTER_TYPE_F, true },
- { BRW_REGISTER_TYPE_HF, devinfo.gen >= 8 },
+ { BRW_REGISTER_TYPE_HF, devinfo.ver >= 8 },
{ BRW_REGISTER_TYPE_VF, file == IMM },
{ BRW_REGISTER_TYPE_Q, devinfo.has_64bit_int },
{ BRW_REGISTER_TYPE_UQ, devinfo.has_64bit_int },
@@ -296,7 +296,7 @@ TEST_P(validation_test, invalid_type_encoding)
{ BRW_REGISTER_TYPE_B, file == FIXED_GRF },
{ BRW_REGISTER_TYPE_UB, file == FIXED_GRF },
{ BRW_REGISTER_TYPE_V, file == IMM },
- { BRW_REGISTER_TYPE_UV, devinfo.gen >= 6 && file == IMM },
+ { BRW_REGISTER_TYPE_UV, devinfo.ver >= 6 && file == IMM },
};
/* Initially assume all hardware encodings are invalid */
@@ -374,10 +374,10 @@ TEST_P(validation_test, invalid_type_encoding)
TEST_P(validation_test, invalid_type_encoding_3src_a16)
{
/* 3-src instructions in align16 mode only supported on Gen6-10 */
- if (devinfo.gen < 6 || devinfo.gen > 10)
+ if (devinfo.ver < 6 || devinfo.ver > 10)
return;
- const int num_bits = devinfo.gen >= 8 ? 3 : 2;
+ const int num_bits = devinfo.ver >= 8 ? 3 : 2;
const int num_encodings = 1 << num_bits;
/* The data types are encoded into <num_bits> bits to be used in hardware
@@ -390,11 +390,11 @@ TEST_P(validation_test, invalid_type_encoding_3src_a16)
enum brw_reg_type type;
bool expected_result;
} test_case[] = {
- { BRW_REGISTER_TYPE_DF, devinfo.gen >= 7 },
+ { BRW_REGISTER_TYPE_DF, devinfo.ver >= 7 },
{ BRW_REGISTER_TYPE_F, true },
- { BRW_REGISTER_TYPE_HF, devinfo.gen >= 8 },
- { BRW_REGISTER_TYPE_D, devinfo.gen >= 7 },
- { BRW_REGISTER_TYPE_UD, devinfo.gen >= 7 },
+ { BRW_REGISTER_TYPE_HF, devinfo.ver >= 8 },
+ { BRW_REGISTER_TYPE_D, devinfo.ver >= 7 },
+ { BRW_REGISTER_TYPE_UD, devinfo.ver >= 7 },
};
/* Initially assume all hardware encodings are invalid */
@@ -445,7 +445,7 @@ TEST_P(validation_test, invalid_type_encoding_3src_a16)
clear_instructions(p);
- if (devinfo.gen == 6)
+ if (devinfo.ver == 6)
break;
}
}
@@ -454,7 +454,7 @@ TEST_P(validation_test, invalid_type_encoding_3src_a16)
TEST_P(validation_test, invalid_type_encoding_3src_a1)
{
/* 3-src instructions in align1 mode only supported on Gen10+ */
- if (devinfo.gen < 10)
+ if (devinfo.ver < 10)
return;
const int num_bits = 3 + 1 /* for exec_type */;
@@ -472,7 +472,7 @@ TEST_P(validation_test, invalid_type_encoding_3src_a1)
bool expected_result;
} test_case[] = {
#define E(x) ((unsigned)BRW_ALIGN1_3SRC_EXEC_TYPE_##x)
- { BRW_REGISTER_TYPE_NF, E(FLOAT), devinfo.gen == 11 },
+ { BRW_REGISTER_TYPE_NF, E(FLOAT), devinfo.ver == 11 },
{ BRW_REGISTER_TYPE_DF, E(FLOAT), devinfo.has_64bit_float },
{ BRW_REGISTER_TYPE_F, E(FLOAT), true },
{ BRW_REGISTER_TYPE_HF, E(FLOAT), true },
@@ -552,23 +552,23 @@ TEST_P(validation_test, invalid_type_encoding_3src_a1)
TEST_P(validation_test, 3src_inst_access_mode)
{
/* 3-src instructions only supported on Gen6+ */
- if (devinfo.gen < 6)
+ if (devinfo.ver < 6)
return;
/* No access mode bit on Gen12+ */
- if (devinfo.gen >= 12)
+ if (devinfo.ver >= 12)
return;
const struct {
unsigned mode;
bool expected_result;
} test_case[] = {
- { BRW_ALIGN_1, devinfo.gen >= 10 },
- { BRW_ALIGN_16, devinfo.gen <= 10 },
+ { BRW_ALIGN_1, devinfo.ver >= 10 },
+ { BRW_ALIGN_16, devinfo.ver <= 10 },
};
for (unsigned i = 0; i < ARRAY_SIZE(test_case); i++) {
- if (devinfo.gen < 10)
+ if (devinfo.ver < 10)
brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_MAD(p, g0, g0, g0, g0);
@@ -751,7 +751,7 @@ TEST_P(validation_test, dst_horizontal_stride_0)
clear_instructions(p);
/* Align16 does not exist on Gen11+ */
- if (devinfo.gen >= 11)
+ if (devinfo.ver >= 11)
return;
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -802,7 +802,7 @@ TEST_P(validation_test, must_not_cross_grf_boundary_in_a_width)
TEST_P(validation_test, dst_hstride_on_align16_must_be_1)
{
/* Align16 does not exist on Gen11+ */
- if (devinfo.gen >= 11)
+ if (devinfo.ver >= 11)
return;
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -824,7 +824,7 @@ TEST_P(validation_test, dst_hstride_on_align16_must_be_1)
TEST_P(validation_test, vstride_on_align16_must_be_0_or_4)
{
/* Align16 does not exist on Gen11+ */
- if (devinfo.gen >= 11)
+ if (devinfo.ver >= 11)
return;
const struct {
@@ -833,7 +833,7 @@ TEST_P(validation_test, vstride_on_align16_must_be_0_or_4)
} vstride[] = {
{ BRW_VERTICAL_STRIDE_0, true },
{ BRW_VERTICAL_STRIDE_1, false },
- { BRW_VERTICAL_STRIDE_2, devinfo.is_haswell || devinfo.gen >= 8 },
+ { BRW_VERTICAL_STRIDE_2, devinfo.is_haswell || devinfo.ver >= 8 },
{ BRW_VERTICAL_STRIDE_4, true },
{ BRW_VERTICAL_STRIDE_8, false },
{ BRW_VERTICAL_STRIDE_16, false },
@@ -988,7 +988,7 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
- if (devinfo.gen >= 9) {
+ if (devinfo.ver >= 9) {
EXPECT_TRUE(validate(p));
} else {
EXPECT_FALSE(validate(p));
@@ -1000,7 +1000,7 @@ TEST_P(validation_test, dst_elements_must_be_evenly_split_between_registers)
brw_ADD(p, g0, g0, g0);
brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 4);
- if (devinfo.gen >= 9) {
+ if (devinfo.ver >= 9) {
EXPECT_TRUE(validate(p));
} else {
EXPECT_FALSE(validate(p));
@@ -1015,7 +1015,7 @@ TEST_P(validation_test, dst_elements_must_be_evenly_split_between_registers)
clear_instructions(p);
- if (devinfo.gen >= 6) {
+ if (devinfo.ver >= 6) {
gen6_math(p, g0, BRW_MATH_FUNCTION_SIN, g0, null);
EXPECT_TRUE(validate(p));
@@ -1042,7 +1042,7 @@ TEST_P(validation_test, two_src_two_dst_source_offsets_must_be_same)
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
- if (devinfo.gen <= 7) {
+ if (devinfo.ver <= 7) {
EXPECT_FALSE(validate(p));
} else {
EXPECT_TRUE(validate(p));
@@ -1075,7 +1075,7 @@ TEST_P(validation_test, two_src_two_dst_each_dst_must_be_derived_from_one_src)
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
- if (devinfo.gen <= 7) {
+ if (devinfo.ver <= 7) {
EXPECT_FALSE(validate(p));
} else {
EXPECT_TRUE(validate(p));
@@ -1090,7 +1090,7 @@ TEST_P(validation_test, two_src_two_dst_each_dst_must_be_derived_from_one_src)
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2);
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
- if (devinfo.gen <= 7) {
+ if (devinfo.ver <= 7) {
EXPECT_FALSE(validate(p));
} else {
EXPECT_TRUE(validate(p));
@@ -1128,7 +1128,7 @@ TEST_P(validation_test, one_src_two_dst)
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1);
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0);
- if (devinfo.gen >= 8) {
+ if (devinfo.ver >= 8) {
EXPECT_TRUE(validate(p));
} else {
EXPECT_FALSE(validate(p));
@@ -1146,7 +1146,7 @@ TEST_P(validation_test, one_src_two_dst)
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0);
brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
- if (devinfo.gen >= 8) {
+ if (devinfo.ver >= 8) {
EXPECT_TRUE(validate(p));
} else {
EXPECT_FALSE(validate(p));
@@ -1234,7 +1234,7 @@ TEST_P(validation_test, byte_destination_relaxed_alignment)
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 1);
- if (devinfo.gen > 4 || devinfo.is_g4x) {
+ if (devinfo.ver > 4 || devinfo.is_g4x) {
EXPECT_TRUE(validate(p));
} else {
EXPECT_FALSE(validate(p));
@@ -1281,7 +1281,7 @@ TEST_P(validation_test, byte_64bit_conversion)
#undef INST
};
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1383,7 +1383,7 @@ TEST_P(validation_test, half_float_conversion)
#undef INST_S
};
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1416,7 +1416,7 @@ TEST_P(validation_test, half_float_conversion)
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
}
- if (devinfo.is_cherryview || devinfo.gen >= 9)
+ if (devinfo.is_cherryview || devinfo.ver >= 9)
EXPECT_EQ(inst[i].expected_result_chv_gen9, validate(p));
else
EXPECT_EQ(inst[i].expected_result_bdw, validate(p));
@@ -1470,7 +1470,7 @@ TEST_P(validation_test, mixed_float_source_indirect_addressing)
#undef INST
};
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1524,7 +1524,7 @@ TEST_P(validation_test, mixed_float_align1_simd16)
#undef INST
};
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1591,7 +1591,7 @@ TEST_P(validation_test, mixed_float_align1_packed_fp16_dst_acc_read_offset_0)
#undef INST
};
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1603,7 +1603,7 @@ TEST_P(validation_test, mixed_float_align1_packed_fp16_dst_acc_read_offset_0)
brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, inst[i].subnr);
- if (devinfo.is_cherryview || devinfo.gen >= 9)
+ if (devinfo.is_cherryview || devinfo.ver >= 9)
EXPECT_EQ(inst[i].expected_result_chv_skl, validate(p));
else
EXPECT_EQ(inst[i].expected_result_bdw, validate(p));
@@ -1667,7 +1667,7 @@ TEST_P(validation_test, mixed_float_fp16_dest_with_acc)
#undef INST
};
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1686,7 +1686,7 @@ TEST_P(validation_test, mixed_float_fp16_dest_with_acc)
brw_inst_set_dst_hstride(&devinfo, last_inst, inst[i].dst_stride);
- if (devinfo.is_cherryview || devinfo.gen >= 9)
+ if (devinfo.is_cherryview || devinfo.ver >= 9)
EXPECT_EQ(inst[i].expected_result_chv_skl, validate(p));
else
EXPECT_EQ(inst[i].expected_result_bdw, validate(p));
@@ -1734,7 +1734,7 @@ TEST_P(validation_test, mixed_float_align1_math_strided_fp16_inputs)
};
/* No half-float math in gen8 */
- if (devinfo.gen < 9)
+ if (devinfo.ver < 9)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1809,7 +1809,7 @@ TEST_P(validation_test, mixed_float_align1_packed_fp16_dst)
#undef INST
};
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -1830,7 +1830,7 @@ TEST_P(validation_test, mixed_float_align1_packed_fp16_dst)
brw_inst_set_exec_size(&devinfo, last_inst, inst[i].exec_size);
- if (devinfo.is_cherryview || devinfo.gen >= 9)
+ if (devinfo.is_cherryview || devinfo.ver >= 9)
EXPECT_EQ(inst[i].expected_result_chv_skl, validate(p));
else
EXPECT_EQ(inst[i].expected_result_bdw, validate(p));
@@ -1878,7 +1878,7 @@ TEST_P(validation_test, mixed_float_align16_packed_data)
#undef INST
};
- if (devinfo.gen < 8 || devinfo.gen >= 11)
+ if (devinfo.ver < 8 || devinfo.ver >= 11)
return;
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -1929,7 +1929,7 @@ TEST_P(validation_test, mixed_float_align16_no_simd16)
#undef INST
};
- if (devinfo.gen < 8 || devinfo.gen >= 11)
+ if (devinfo.ver < 8 || devinfo.ver >= 11)
return;
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -1980,7 +1980,7 @@ TEST_P(validation_test, mixed_float_align16_no_acc_read)
#undef INST
};
- if (devinfo.gen < 8 || devinfo.gen >= 11)
+ if (devinfo.ver < 8 || devinfo.ver >= 11)
return;
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -2035,7 +2035,7 @@ TEST_P(validation_test, mixed_float_align16_math_packed_format)
};
/* Align16 Math for mixed float mode is not supported in gen8 */
- if (devinfo.gen < 9 || devinfo.gen >= 11)
+ if (devinfo.ver < 9 || devinfo.ver >= 11)
return;
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -2079,7 +2079,7 @@ TEST_P(validation_test, vector_immediate_destination_alignment)
for (unsigned i = 0; i < ARRAY_SIZE(move); i++) {
/* UV type is Gen6+ */
- if (devinfo.gen < 6 &&
+ if (devinfo.ver < 6 &&
move[i].src_type == BRW_REGISTER_TYPE_UV)
continue;
@@ -2121,7 +2121,7 @@ TEST_P(validation_test, vector_immediate_destination_stride)
for (unsigned i = 0; i < ARRAY_SIZE(move); i++) {
/* UV type is Gen6+ */
- if (devinfo.gen < 6 &&
+ if (devinfo.ver < 6 &&
move[i].src_type == BRW_REGISTER_TYPE_UV)
continue;
@@ -2272,11 +2272,11 @@ TEST_P(validation_test, qword_low_power_align1_regioning_restrictions)
};
/* These restrictions only apply to Gen8+ */
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
/* NoDDChk/NoDDClr does not exist on Gen12+ */
- if (devinfo.gen >= 12)
+ if (devinfo.ver >= 12)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -2408,7 +2408,7 @@ TEST_P(validation_test, qword_low_power_no_indirect_addressing)
};
/* These restrictions only apply to Gen8+ */
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -2556,7 +2556,7 @@ TEST_P(validation_test, qword_low_power_no_64bit_arf)
};
/* These restrictions only apply to Gen8+ */
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -2661,11 +2661,11 @@ TEST_P(validation_test, align16_64_bit_integer)
};
/* 64-bit integer types exist on Gen8+ */
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
/* Align16 does not exist on Gen11+ */
- if (devinfo.gen >= 11)
+ if (devinfo.ver >= 11)
return;
brw_set_default_access_mode(p, BRW_ALIGN_16);
@@ -2769,11 +2769,11 @@ TEST_P(validation_test, qword_low_power_no_depctrl)
};
/* These restrictions only apply to Gen8+ */
- if (devinfo.gen < 8)
+ if (devinfo.ver < 8)
return;
/* NoDDChk/NoDDClr does not exist on Gen12+ */
- if (devinfo.gen >= 12)
+ if (devinfo.ver >= 12)
return;
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
@@ -2887,7 +2887,7 @@ TEST_P(validation_test, gen11_no_byte_src_1_2)
for (unsigned i = 0; i < ARRAY_SIZE(inst); i++) {
/* Skip instruction not meant for this gen. */
- if (devinfo.gen != inst[i].gen)
+ if (devinfo.ver != inst[i].gen)
continue;
brw_push_insn_state(p);
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-08 21:00:37 +0000