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Diffstat (limited to 'src/gallium/auxiliary/util/u_threaded_context.h')
-rw-r--r--src/gallium/auxiliary/util/u_threaded_context.h37
1 files changed, 35 insertions, 2 deletions
diff --git a/src/gallium/auxiliary/util/u_threaded_context.h b/src/gallium/auxiliary/util/u_threaded_context.h
index 72ffe7819ac..8c41a018f74 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.h
+++ b/src/gallium/auxiliary/util/u_threaded_context.h
@@ -191,6 +191,7 @@
#include "c11/threads.h"
#include "pipe/p_context.h"
#include "pipe/p_state.h"
+#include "util/bitset.h"
#include "util/u_inlines.h"
#include "util/u_queue.h"
#include "util/u_range.h"
@@ -240,6 +241,13 @@ struct tc_unflushed_batch_token;
*/
#define TC_MAX_BUFFER_LISTS (TC_MAX_BATCHES * 4)
+/* This mask is used to get a hash of a buffer ID. It's also the bit size of
+ * the buffer list - 1. It must be 2^n - 1. The size should be as low as
+ * possible to minimize memory usage, but high enough to minimize hash
+ * collisions.
+ */
+#define TC_BUFFER_ID_MASK BITFIELD_MASK(14)
+
/* Threshold for when to use the queue or sync. */
#define TC_MAX_STRING_MARKER_BYTES 512
@@ -357,12 +365,18 @@ struct tc_batch {
#if !defined(NDEBUG) && TC_DEBUG >= 1
unsigned sentinel;
#endif
- unsigned num_total_slots;
+ uint16_t num_total_slots;
+ uint16_t buffer_list_index;
struct util_queue_fence fence;
struct tc_unflushed_batch_token *token;
uint64_t slots[TC_SLOTS_PER_BATCH];
};
+struct tc_buffer_list {
+ /* Buffer list where bit N means whether ID hash N is in the list. */
+ BITSET_DECLARE(buffer_list, TC_BUFFER_ID_MASK + 1);
+};
+
struct threaded_context {
struct pipe_context base;
struct pipe_context *pipe;
@@ -382,6 +396,8 @@ struct threaded_context {
bool driver_calls_flush_notify;
bool use_forced_staging_uploads;
+ bool add_all_gfx_bindings_to_buffer_list;
+ bool add_all_compute_bindings_to_buffer_list;
/* Estimation of how much vram/gtt bytes are mmap'd in
* the current tc_batch.
@@ -405,13 +421,18 @@ struct threaded_context {
bool seen_tes;
bool seen_gs;
+ bool seen_streamout_buffers;
+ bool seen_shader_buffers[PIPE_SHADER_TYPES];
+ bool seen_image_buffers[PIPE_SHADER_TYPES];
+ bool seen_sampler_buffers[PIPE_SHADER_TYPES];
+
unsigned max_vertex_buffers;
unsigned max_const_buffers;
unsigned max_shader_buffers;
unsigned max_images;
unsigned max_samplers;
- unsigned last, next;
+ unsigned last, next, next_buf_list;
/* The list fences that the driver should signal after the next flush.
* If this is empty, all driver command buffers have been flushed.
@@ -419,7 +440,19 @@ struct threaded_context {
struct util_queue_fence *signal_fences_next_flush[TC_MAX_BUFFER_LISTS];
unsigned num_signal_fences_next_flush;
+ /* Bound buffers are tracked here using threaded_resource::buffer_id_hash.
+ * 0 means unbound.
+ */
+ uint32_t vertex_buffers[PIPE_MAX_ATTRIBS];
+ uint32_t streamout_buffers[PIPE_MAX_SO_BUFFERS];
+ uint32_t const_buffers[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS];
+ uint32_t shader_buffers[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS];
+ uint32_t image_buffers[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_IMAGES];
+ /* Don't use PIPE_MAX_SHADER_SAMPLER_VIEWS because it's too large. */
+ uint32_t sampler_buffers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
+
struct tc_batch batch_slots[TC_MAX_BATCHES];
+ struct tc_buffer_list buffer_lists[TC_MAX_BUFFER_LISTS];
};
void threaded_resource_init(struct pipe_resource *res);