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path: root/src/broadcom/compiler/vir_register_allocate.c
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Diffstat (limited to 'src/broadcom/compiler/vir_register_allocate.c')
-rw-r--r--src/broadcom/compiler/vir_register_allocate.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/broadcom/compiler/vir_register_allocate.c b/src/broadcom/compiler/vir_register_allocate.c
index 09107523fb1..ca1428bdfb6 100644
--- a/src/broadcom/compiler/vir_register_allocate.c
+++ b/src/broadcom/compiler/vir_register_allocate.c
@@ -499,6 +499,8 @@ v3d_emit_tmu_spill(struct v3d_compile *c,
c->cursor = vir_after_inst(position);
+ enum v3d_qpu_cond cond = vir_get_cond(inst);
+
/* If inst and position don't match, this is a postponed spill,
* in which case we have already allocated the temp for the spill
* and we should use that, otherwise create a new temp with the
@@ -511,9 +513,15 @@ v3d_emit_tmu_spill(struct v3d_compile *c,
add_node(c, inst->dst.index, class_bits);
} else {
inst->dst = spill_temp;
+
+ /* If this is a postponed spill the register being spilled may
+ * have been written more than once including conditional
+ * writes, so ignore predication on the spill instruction and
+ * always spill the full register.
+ */
+ cond = V3D_QPU_COND_NONE;
}
- enum v3d_qpu_cond cond = vir_get_cond(inst);
struct qinst *tmp =
vir_MOV_dest(c, vir_reg(QFILE_MAGIC, V3D_QPU_WADDR_TMUD),
inst->dst);