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authorMarek Olšák <marek.olsak@amd.com>2014-04-20 15:17:23 +0200
committerMarek Olšák <marek.olsak@amd.com>2014-04-25 01:33:12 +0200
commitef162cf13df96b2c8ab36001b8dab5640cabf05f (patch)
treed9e60f5bd99d4a13db9af1fc164e908f895372e8 /src
parent0967970768c517c8c2f1a969e0a043982b4b1bf7 (diff)
r600g: fix for HTILE on R6xx
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 55caece541f..e30d933093d 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -542,6 +542,12 @@ static unsigned r600_texture_htile_alloc_size(struct r600_common_screen *rscreen
return 0;
}
+ /* HW bug on R6xx. */
+ if (rscreen->chip_class == R600 &&
+ (rtex->surface.level[0].npix_x > 7680 ||
+ rtex->surface.level[0].npix_y > 7680))
+ return 0;
+
/* this alignment and htile size only apply to linear htile buffer */
sw = align(sw, 16 << 3);
sh = align(sh, npipes << 3);