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authorDave Airlie <airlied@redhat.com>2009-08-16 18:42:24 +1000
committerDave Airlie <airlied@redhat.com>2009-08-18 20:10:50 +1000
commit9ad76e9479c9c3cb8b2947d5144de33bb31197b8 (patch)
tree360207b69b08fd5281c0353feb622c7ae1aeeecf /src/mesa/drivers/dri/radeon/radeon_common_context.h
parent0e705c0dd397fe3c607551f988614178dacb9fa4 (diff)
r300: OQ rework
Move to common code base so radeon/r200 can add support for this. Make OQ start a state emitted like all normal state, and make no-tcl flushing work in proper places. Really need a generic post emit space reservation mechanism like max_state so we can reserve some space for the emit this code passes demos/arbocclude, piglit occlusion query and glean occlusion query with TCL and NO-TCL on my rv530.
Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_common_context.h')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.h20
1 files changed, 19 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ee46c1f81a6..a9480cd2e4c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -163,6 +163,7 @@ struct radeon_hw_state {
/* Head of the linked list of state atoms. */
struct radeon_state_atom atomlist;
int max_state_size; /* Number of bytes necessary for a full state emit. */
+ int max_post_flush_size; /* Number of bytes necessary for post flushing emits */
GLboolean is_dirty, all_dirty;
};
@@ -254,6 +255,17 @@ static INLINE radeonTexObj* radeon_tex_obj(struct gl_texture_object *texObj)
return (radeonTexObj*)texObj;
}
+/* occlusion query */
+struct radeon_query_object {
+ struct gl_query_object Base;
+ struct radeon_bo *bo;
+ int curr_offset;
+ GLboolean emitted_begin;
+
+ /* Double linked list of not flushed query objects */
+ struct radeon_query_object *prev, *next;
+};
+
/* Need refcounting on dma buffers:
*/
struct radeon_dma_buffer {
@@ -500,6 +512,12 @@ struct radeon_context {
struct dri_metaops meta;
struct {
+ struct radeon_query_object *current;
+ struct radeon_query_object not_flushed_head;
+ struct radeon_state_atom queryobj;
+ } query;
+
+ struct {
void (*get_lock)(radeonContextPtr radeon);
void (*update_viewport_offset)(GLcontext *ctx);
void (*emit_cs_header)(struct radeon_cs *cs, radeonContextPtr rmesa);
@@ -508,6 +526,7 @@ struct radeon_context {
void (*pre_emit_state)(radeonContextPtr rmesa);
void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode);
void (*free_context)(GLcontext *ctx);
+ void (*emit_query_finish)(radeonContextPtr radeon);
} vtbl;
};
@@ -523,7 +542,6 @@ static inline __DRIdrawablePrivate* radeon_get_readable(radeonContextPtr radeon)
return radeon->dri.context->driReadablePriv;
}
-
/**
* This function takes a float and packs it into a uint32_t
*/