diff options
| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2017-12-13 10:17:40 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2017-12-14 13:27:22 -0800 |
| commit | 35f9c27be3e24d3047fb5f9fc91f8b23c2176577 (patch) | |
| tree | 8bf0eb05deea5cb867bc2046525d8ea8ac4e7463 /src/intel/tools/gen_batch_decoder.c | |
| parent | 81e4ecbc19debbbc96504582fc226e7e954ec316 (diff) | |
intel/batch-decoder: Decode registers
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Diffstat (limited to 'src/intel/tools/gen_batch_decoder.c')
| -rw-r--r-- | src/intel/tools/gen_batch_decoder.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/intel/tools/gen_batch_decoder.c b/src/intel/tools/gen_batch_decoder.c index 935a1fdbc64..e8dd19b33e0 100644 --- a/src/intel/tools/gen_batch_decoder.c +++ b/src/intel/tools/gen_batch_decoder.c @@ -642,6 +642,18 @@ decode_3dstate_scissor_state_pointers(struct gen_batch_decode_ctx *ctx, decode_dynamic_state_pointers(ctx, "SCISSOR_RECT", p, 1); } +static void +decode_load_register_imm(struct gen_batch_decode_ctx *ctx, const uint32_t *p) +{ + struct gen_group *reg = gen_spec_find_register(ctx->spec, p[1]); + + if (reg != NULL) { + fprintf(ctx->fp, "register %s (0x%x): 0x%x\n", + reg->name, reg->register_offset, p[2]); + ctx_print_group(ctx, reg, reg->register_offset, &p[2]); + } +} + struct custom_decoder { const char *cmd_name; void (*decode)(struct gen_batch_decode_ctx *ctx, const uint32_t *p); @@ -679,6 +691,7 @@ struct custom_decoder { { "3DSTATE_BLEND_STATE_POINTERS", decode_3dstate_blend_state_pointers }, { "3DSTATE_CC_STATE_POINTERS", decode_3dstate_cc_state_pointers }, { "3DSTATE_SCISSOR_STATE_POINTERS", decode_3dstate_scissor_state_pointers }, + { "MI_LOAD_REGISTER_IMM", decode_load_register_imm } }; static inline uint64_t |