diff options
author | Marek Olšák <marek.olsak@amd.com> | 2022-05-12 02:50:17 -0400 |
---|---|---|
committer | Marek Olšák <marek.olsak@amd.com> | 2022-05-13 14:56:22 -0400 |
commit | 39800f0fa3104c56736d5beb70a7920a33be48de (patch) | |
tree | 8c658b5a75bc52b5fe0a66c09d4f326438cf4508 /src/gallium/drivers/r600/r600_blit.c | |
parent | 6dcf7f651f421c0f46ebf9c4c5904f452ea14eb1 (diff) |
amd: change chip_class naming to "enum amd_gfx_level gfx_level"
This aligns the naming with PAL.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
Diffstat (limited to 'src/gallium/drivers/r600/r600_blit.c')
-rw-r--r-- | src/gallium/drivers/r600/r600_blit.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index ddceebfeffe..5f386c9ff27 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -131,7 +131,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx, /* XXX Decompressing MSAA depth textures is broken on R6xx. * There is also a hardlock if CMASK and FMASK are not present. * Just skip this until we find out how to fix it. */ - if (rctx->b.chip_class == R600 && max_sample > 0) { + if (rctx->b.gfx_level == R600 && max_sample > 0) { texture->dirty_level_mask = 0; return; } @@ -470,7 +470,7 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers, struct r600_context *rctx = (struct r600_context *)ctx; struct pipe_framebuffer_state *fb = &rctx->framebuffer.state; - if (buffers & PIPE_CLEAR_COLOR && rctx->b.chip_class >= EVERGREEN) { + if (buffers & PIPE_CLEAR_COLOR && rctx->b.gfx_level >= EVERGREEN) { evergreen_do_fast_color_clear(&rctx->b, fb, &rctx->framebuffer.atom, &buffers, NULL, color); if (!buffers) @@ -648,7 +648,7 @@ static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *ds struct r600_context *rctx = (struct r600_context*)ctx; if (rctx->screen->b.has_cp_dma && - rctx->b.chip_class >= EVERGREEN && + rctx->b.gfx_level >= EVERGREEN && offset % 4 == 0 && size % 4 == 0) { evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher); } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) { @@ -796,7 +796,7 @@ void r600_resource_copy_region(struct pipe_context *ctx, dst->width0, dst->height0, dst_width, dst_height); - if (rctx->b.chip_class >= EVERGREEN) { + if (rctx->b.gfx_level >= EVERGREEN) { src_view = evergreen_create_sampler_view_custom(ctx, src, &src_templ, src_width0, src_height0, src_force_level); @@ -829,7 +829,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level); enum pipe_format format = info->src.format; unsigned sample_mask = - rctx->b.chip_class == CAYMAN ? ~0 : + rctx->b.gfx_level == CAYMAN ? ~0 : ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1); struct pipe_resource *tmp, templ; struct pipe_blit_info blit; |