diff options
| author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2022-12-08 13:55:34 +0100 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2022-12-08 13:28:00 +0000 |
| commit | 011a0b97b2e93550c5fbcb01bbb8a2c210f028a5 (patch) | |
| tree | 7a644575a7cb6cd50567a3b2b7e1b5850101418d /src/amd/vulkan/radv_nir_to_llvm.c | |
| parent | 67c9497435c1a557e5313d58b26a6b45818479d1 (diff) | |
radv,aco: move radv_ps_epilog_key to the graphics pipeline key
To avoid redundant structs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>
Diffstat (limited to 'src/amd/vulkan/radv_nir_to_llvm.c')
| -rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 03638630cf8..ec608fdab96 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -567,10 +567,12 @@ si_llvm_init_export_args(struct radv_shader_context *ctx, LLVMValueRef *values, bool is_16bit = ac_get_type_size(LLVMTypeOf(values[0])) == 2; if (ctx->stage == MESA_SHADER_FRAGMENT) { - unsigned col_format = (ctx->options->key.ps.spi_shader_col_format >> (4 * index)) & 0xf; - bool is_int8 = (ctx->options->key.ps.color_is_int8 >> index) & 1; - bool is_int10 = (ctx->options->key.ps.color_is_int10 >> index) & 1; - bool enable_mrt_output_nan_fixup = (ctx->options->key.ps.enable_mrt_output_nan_fixup >> index) & 1; + unsigned col_format = + (ctx->options->key.ps.epilog.spi_shader_col_format >> (4 * index)) & 0xf; + bool is_int8 = (ctx->options->key.ps.epilog.color_is_int8 >> index) & 1; + bool is_int10 = (ctx->options->key.ps.epilog.color_is_int10 >> index) & 1; + bool enable_mrt_output_nan_fixup = + (ctx->options->key.ps.epilog.enable_mrt_output_nan_fixup >> index) & 1; LLVMValueRef (*packf)(struct ac_llvm_context * ctx, LLVMValueRef args[2]) = NULL; LLVMValueRef (*packi)(struct ac_llvm_context * ctx, LLVMValueRef args[2], unsigned bits, @@ -937,7 +939,7 @@ si_export_mrt_color(struct radv_shader_context *ctx, LLVMValueRef *color, unsign { unsigned mrt_target = V_008DFC_SQ_EXP_MRT + target; - if (ctx->options->gfx_level >= GFX11 && ctx->options->key.ps.mrt0_is_dual_src && + if (ctx->options->gfx_level >= GFX11 && ctx->options->key.ps.epilog.mrt0_is_dual_src && (target == 0 || target == 1)) { mrt_target += 21; } @@ -1006,7 +1008,7 @@ handle_fs_outputs_post(struct radv_shader_context *ctx) color_args[last].valid_mask = 1; /* whether the EXEC mask is valid */ color_args[last].done = 1; /* DONE bit */ - if (ctx->options->gfx_level >= GFX11 && ctx->options->key.ps.mrt0_is_dual_src) { + if (ctx->options->gfx_level >= GFX11 && ctx->options->key.ps.epilog.mrt0_is_dual_src) { ac_build_dual_src_blend_swizzle(&ctx->ac, &color_args[0], &color_args[1]); } } |