radeon: add some tiling support for r100.

This sets up the tiling flags on the blitter.

Fixes some piglit tests with tiling enabled.

Signed-off-by: Dave Airlie <airlied@redhat.com>

2 files changed, 13 insertions, 0 deletions

diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index b84f2fa9f2b..4233221165f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -139,6 +139,11 @@ static void inline emit_tx_setup(struct r100_context *r100,
     default:
             break;
     }
+    
+    if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE)
+       offset |= RADEON_TXO_MACRO_TILE;
+    if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE)
+       offset |= RADEON_TXO_MICRO_TILE_X2;
 
     BEGIN_BATCH(18);
     OUT_BATCH_REGVAL(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
@@ -203,6 +208,12 @@ static inline void emit_cb_setup(struct r100_context *r100,
             break;
     }
 
+    if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE)
+        dst_pitch |= RADEON_COLOR_TILE_ENABLE;
+
+    if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE)
+        dst_pitch |= RADEON_COLOR_MICROTILE_ENABLE;
+
     BEGIN_BATCH_NO_AUTOSTATE(18);
     OUT_BATCH_REGVAL(RADEON_RE_TOP_LEFT, 0);
     OUT_BATCH_REGVAL(RADEON_RE_WIDTH_HEIGHT, ((width << RADEON_RE_WIDTH_SHIFT) |
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index eb31fe895cf..8edba6ec9de 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -351,6 +351,8 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
    cbpitch = (rrb->pitch / rrb->cpp);
    if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE)
        cbpitch |= R200_COLOR_TILE_ENABLE;
+   if (rrb->bo->flags & RADEON_BO_FLAGS_MICRO_TILE)
+       cbpitch |= RADEON_COLOR_MICROTILE_ENABLE;
 
    drb = radeon_get_depthbuffer(&r100->radeon);
    if (drb) {