~vlj/llvm - AMDGPU backend development for LLVM

Age	Commit message (Expand)	Author	Files	Lines
2013-05-04	R600: Relax some vector constraints on Dot4.codesize6	Vincent Lejeune	1	-0/+2
2013-05-04	R600: transonly in a separate ig ?	Vincent Lejeune	1	-1/+1
2013-05-04	R600: Recompute schedule graph non order dependencies.	Vincent Lejeune	1	-21/+219
2013-05-04	R600: Use bottom up scheduling algorithm	Vincent Lejeune	1	-94/+91
2013-05-04	R600: Factorize Fetch size limit inside AMDGPUSubTarget	Vincent Lejeune	1	-8/+4
2013-04-03	R600: Factorize maximum alu per clause in a single location	Vincent Lejeune	1	-1/+1
2013-03-14	R600: Factorize code handling Const Read Port limitation	Vincent Lejeune	1	-68/+7
2013-03-11	R600MachineScheduler.cpp: Fix use cases of dbgs(). Don't include <iostream> h...	NAKAMURA Takumi	1	-1/+2
2013-03-05	R600: initial scheduler code	Vincent Lejeune	1	-0/+487