diff options
Diffstat (limited to 'test/CodeGen/R600/xor.ll')
| -rw-r--r-- | test/CodeGen/R600/xor.ll | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/test/CodeGen/R600/xor.ll b/test/CodeGen/R600/xor.ll index 00e57f68ec7..fa54e3816d5 100644 --- a/test/CodeGen/R600/xor.ll +++ b/test/CodeGen/R600/xor.ll @@ -6,8 +6,8 @@ ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ;SI-CHECK: {{^}}xor_v2i32: -;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} -;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +;SI-CHECK: v_xor_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +;SI-CHECK: v_xor_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} define void @xor_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1) { @@ -25,10 +25,10 @@ define void @xor_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ;SI-CHECK: {{^}}xor_v4i32: -;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} -;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} -;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} -;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} +;SI-CHECK: v_xor_b32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} +;SI-CHECK: v_xor_b32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} +;SI-CHECK: v_xor_b32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} +;SI-CHECK: v_xor_b32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}} define void @xor_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1) { %a = load <4 x i32> addrspace(1) * %in0 @@ -42,7 +42,7 @@ define void @xor_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], PS}} ;SI-CHECK: {{^}}xor_i1: -;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} +;SI-CHECK: v_xor_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float addrspace(1)* %in1) { %a = load float addrspace(1) * %in0 @@ -56,7 +56,7 @@ define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float ad } ; SI-CHECK-LABEL: {{^}}vector_xor_i32: -; SI-CHECK: V_XOR_B32_e32 +; SI-CHECK: v_xor_b32_e32 define void @vector_xor_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32 addrspace(1)* %in1) { %a = load i32 addrspace(1)* %in0 %b = load i32 addrspace(1)* %in1 @@ -66,7 +66,7 @@ define void @vector_xor_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32 } ; SI-CHECK-LABEL: {{^}}scalar_xor_i32: -; SI-CHECK: S_XOR_B32 +; SI-CHECK: s_xor_b32 define void @scalar_xor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) { %result = xor i32 %a, %b store i32 %result, i32 addrspace(1)* %out @@ -74,7 +74,7 @@ define void @scalar_xor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) { } ; SI-CHECK-LABEL: {{^}}scalar_not_i32: -; SI-CHECK: S_NOT_B32 +; SI-CHECK: s_not_b32 define void @scalar_not_i32(i32 addrspace(1)* %out, i32 %a) { %result = xor i32 %a, -1 store i32 %result, i32 addrspace(1)* %out @@ -82,7 +82,7 @@ define void @scalar_not_i32(i32 addrspace(1)* %out, i32 %a) { } ; SI-CHECK-LABEL: {{^}}vector_not_i32: -; SI-CHECK: V_NOT_B32 +; SI-CHECK: v_not_b32 define void @vector_not_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32 addrspace(1)* %in1) { %a = load i32 addrspace(1)* %in0 %b = load i32 addrspace(1)* %in1 @@ -92,9 +92,9 @@ define void @vector_not_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32 } ; SI-CHECK-LABEL: {{^}}vector_xor_i64: -; SI-CHECK: V_XOR_B32_e32 -; SI-CHECK: V_XOR_B32_e32 -; SI-CHECK: S_ENDPGM +; SI-CHECK: v_xor_b32_e32 +; SI-CHECK: v_xor_b32_e32 +; SI-CHECK: s_endpgm define void @vector_xor_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in0, i64 addrspace(1)* %in1) { %a = load i64 addrspace(1)* %in0 %b = load i64 addrspace(1)* %in1 @@ -104,8 +104,8 @@ define void @vector_xor_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in0, i64 } ; SI-CHECK-LABEL: {{^}}scalar_xor_i64: -; SI-CHECK: S_XOR_B64 -; SI-CHECK: S_ENDPGM +; SI-CHECK: s_xor_b64 +; SI-CHECK: s_endpgm define void @scalar_xor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) { %result = xor i64 %a, %b store i64 %result, i64 addrspace(1)* %out @@ -113,7 +113,7 @@ define void @scalar_xor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) { } ; SI-CHECK-LABEL: {{^}}scalar_not_i64: -; SI-CHECK: S_NOT_B64 +; SI-CHECK: s_not_b64 define void @scalar_not_i64(i64 addrspace(1)* %out, i64 %a) { %result = xor i64 %a, -1 store i64 %result, i64 addrspace(1)* %out @@ -121,8 +121,8 @@ define void @scalar_not_i64(i64 addrspace(1)* %out, i64 %a) { } ; SI-CHECK-LABEL: {{^}}vector_not_i64: -; SI-CHECK: V_NOT_B32 -; SI-CHECK: V_NOT_B32 +; SI-CHECK: v_not_b32 +; SI-CHECK: v_not_b32 define void @vector_not_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in0, i64 addrspace(1)* %in1) { %a = load i64 addrspace(1)* %in0 %b = load i64 addrspace(1)* %in1 @@ -136,7 +136,7 @@ define void @vector_not_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in0, i64 ; use an SALU instruction for this. ; SI-CHECK-LABEL: {{^}}xor_cf: -; SI-CHECK: S_XOR_B64 +; SI-CHECK: s_xor_b64 define void @xor_cf(i64 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %a, i64 %b) { entry: %0 = icmp eq i64 %a, 0 |