diff options
Diffstat (limited to 'test/CodeGen/R600/mul.ll')
| -rw-r--r-- | test/CodeGen/R600/mul.ll | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/test/CodeGen/R600/mul.ll b/test/CodeGen/R600/mul.ll index bf1a1e1ffef..be5d6a0a2ba 100644 --- a/test/CodeGen/R600/mul.ll +++ b/test/CodeGen/R600/mul.ll @@ -7,8 +7,8 @@ ; EG: MULLO_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; EG: MULLO_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; SI: V_MUL_LO_I32 v{{[0-9]+, v[0-9]+, v[0-9]+}} -; SI: V_MUL_LO_I32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +; SI: v_mul_lo_i32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +; SI: v_mul_lo_i32 v{{[0-9]+, v[0-9]+, v[0-9]+}} define void @test_mul_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1 @@ -25,10 +25,10 @@ define void @test_mul_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1) ; EG: MULLO_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; EG: MULLO_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; SI: V_MUL_LO_I32 v{{[0-9]+, v[0-9]+, v[0-9]+}} -; SI: V_MUL_LO_I32 v{{[0-9]+, v[0-9]+, v[0-9]+}} -; SI: V_MUL_LO_I32 v{{[0-9]+, v[0-9]+, v[0-9]+}} -; SI: V_MUL_LO_I32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +; SI: v_mul_lo_i32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +; SI: v_mul_lo_i32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +; SI: v_mul_lo_i32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +; SI: v_mul_lo_i32 v{{[0-9]+, v[0-9]+, v[0-9]+}} define void @v_mul_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1 @@ -40,10 +40,10 @@ define void @v_mul_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* % } ; FUNC-LABEL: {{^}}s_trunc_i64_mul_to_i32: -; SI: S_LOAD_DWORD -; SI: S_LOAD_DWORD -; SI: S_MUL_I32 -; SI: BUFFER_STORE_DWORD +; SI: s_load_dword +; SI: s_load_dword +; SI: s_mul_i32 +; SI: buffer_store_dword define void @s_trunc_i64_mul_to_i32(i32 addrspace(1)* %out, i64 %a, i64 %b) { %mul = mul i64 %b, %a %trunc = trunc i64 %mul to i32 @@ -52,10 +52,10 @@ define void @s_trunc_i64_mul_to_i32(i32 addrspace(1)* %out, i64 %a, i64 %b) { } ; FUNC-LABEL: {{^}}v_trunc_i64_mul_to_i32: -; SI: S_LOAD_DWORD -; SI: S_LOAD_DWORD -; SI: V_MUL_LO_I32 -; SI: BUFFER_STORE_DWORD +; SI: s_load_dword +; SI: s_load_dword +; SI: v_mul_lo_i32 +; SI: buffer_store_dword define void @v_trunc_i64_mul_to_i32(i32 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind { %a = load i64 addrspace(1)* %aptr, align 8 %b = load i64 addrspace(1)* %bptr, align 8 @@ -70,8 +70,8 @@ define void @v_trunc_i64_mul_to_i32(i32 addrspace(1)* %out, i64 addrspace(1)* %a ; FUNC-LABEL: {{^}}mul64_sext_c: ; EG-DAG: MULLO_INT ; EG-DAG: MULHI_INT -; SI-DAG: S_MUL_I32 -; SI-DAG: V_MUL_HI_I32 +; SI-DAG: s_mul_i32 +; SI-DAG: v_mul_hi_i32 define void @mul64_sext_c(i64 addrspace(1)* %out, i32 %in) { entry: %0 = sext i32 %in to i64 @@ -83,9 +83,9 @@ entry: ; FUNC-LABEL: {{^}}v_mul64_sext_c: ; EG-DAG: MULLO_INT ; EG-DAG: MULHI_INT -; SI-DAG: V_MUL_LO_I32 -; SI-DAG: V_MUL_HI_I32 -; SI: S_ENDPGM +; SI-DAG: v_mul_lo_i32 +; SI-DAG: v_mul_hi_i32 +; SI: s_endpgm define void @v_mul64_sext_c(i64 addrspace(1)* %out, i32 addrspace(1)* %in) { %val = load i32 addrspace(1)* %in, align 4 %ext = sext i32 %val to i64 @@ -95,9 +95,9 @@ define void @v_mul64_sext_c(i64 addrspace(1)* %out, i32 addrspace(1)* %in) { } ; FUNC-LABEL: {{^}}v_mul64_sext_inline_imm: -; SI-DAG: V_MUL_LO_I32 v{{[0-9]+}}, 9, v{{[0-9]+}} -; SI-DAG: V_MUL_HI_I32 v{{[0-9]+}}, 9, v{{[0-9]+}} -; SI: S_ENDPGM +; SI-DAG: v_mul_lo_i32 v{{[0-9]+}}, 9, v{{[0-9]+}} +; SI-DAG: v_mul_hi_i32 v{{[0-9]+}}, 9, v{{[0-9]+}} +; SI: s_endpgm define void @v_mul64_sext_inline_imm(i64 addrspace(1)* %out, i32 addrspace(1)* %in) { %val = load i32 addrspace(1)* %in, align 4 %ext = sext i32 %val to i64 @@ -107,12 +107,12 @@ define void @v_mul64_sext_inline_imm(i64 addrspace(1)* %out, i32 addrspace(1)* % } ; FUNC-LABEL: {{^}}s_mul_i32: -; SI: S_LOAD_DWORD [[SRC0:s[0-9]+]], -; SI: S_LOAD_DWORD [[SRC1:s[0-9]+]], -; SI: S_MUL_I32 [[SRESULT:s[0-9]+]], [[SRC0]], [[SRC1]] -; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] -; SI: BUFFER_STORE_DWORD [[VRESULT]], -; SI: S_ENDPGM +; SI: s_load_dword [[SRC0:s[0-9]+]], +; SI: s_load_dword [[SRC1:s[0-9]+]], +; SI: s_mul_i32 [[SRESULT:s[0-9]+]], [[SRC0]], [[SRC1]] +; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] +; SI: buffer_store_dword [[VRESULT]], +; SI: s_endpgm define void @s_mul_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind { %mul = mul i32 %a, %b store i32 %mul, i32 addrspace(1)* %out, align 4 @@ -120,7 +120,7 @@ define void @s_mul_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind { } ; FUNC-LABEL: {{^}}v_mul_i32: -; SI: V_MUL_LO_I32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} +; SI: v_mul_lo_i32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} define void @v_mul_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { %b_ptr = getelementptr i32 addrspace(1)* %in, i32 1 %a = load i32 addrspace(1)* %in @@ -145,7 +145,7 @@ define void @s_mul_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind { } ; FUNC-LABEL: {{^}}v_mul_i64: -; SI: V_MUL_LO_I32 +; SI: v_mul_lo_i32 define void @v_mul_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) { %a = load i64 addrspace(1)* %aptr, align 8 %b = load i64 addrspace(1)* %bptr, align 8 @@ -155,7 +155,7 @@ define void @v_mul_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addr } ; FUNC-LABEL: {{^}}mul32_in_branch: -; SI: S_MUL_I32 +; SI: s_mul_i32 define void @mul32_in_branch(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %a, i32 %b, i32 %c) { entry: %0 = icmp eq i32 %a, 0 @@ -176,9 +176,9 @@ endif: } ; FUNC-LABEL: {{^}}mul64_in_branch: -; SI-DAG: S_MUL_I32 -; SI-DAG: V_MUL_HI_U32 -; SI: S_ENDPGM +; SI-DAG: s_mul_i32 +; SI-DAG: v_mul_hi_u32 +; SI: s_endpgm define void @mul64_in_branch(i64 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %a, i64 %b, i64 %c) { entry: %0 = icmp eq i64 %a, 0 |