diff options
Diffstat (limited to 'test/CodeGen/R600/ctlz_zero_undef.ll')
| -rw-r--r-- | test/CodeGen/R600/ctlz_zero_undef.ll | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/test/CodeGen/R600/ctlz_zero_undef.ll b/test/CodeGen/R600/ctlz_zero_undef.ll index c7f91650729..f699127fb60 100644 --- a/test/CodeGen/R600/ctlz_zero_undef.ll +++ b/test/CodeGen/R600/ctlz_zero_undef.ll @@ -6,11 +6,11 @@ declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone ; FUNC-LABEL: {{^}}s_ctlz_zero_undef_i32: -; SI: S_LOAD_DWORD [[VAL:s[0-9]+]], -; SI: S_FLBIT_I32_B32 [[SRESULT:s[0-9]+]], [[VAL]] -; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] -; SI: BUFFER_STORE_DWORD [[VRESULT]], -; SI: S_ENDPGM +; SI: s_load_dword [[VAL:s[0-9]+]], +; SI: s_flbit_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]] +; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] +; SI: buffer_store_dword [[VRESULT]], +; SI: s_endpgm ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+\.[XYZW]]] ; EG: FFBH_UINT {{\*? *}}[[RESULT]] define void @s_ctlz_zero_undef_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind { @@ -20,10 +20,10 @@ define void @s_ctlz_zero_undef_i32(i32 addrspace(1)* noalias %out, i32 %val) nou } ; FUNC-LABEL: {{^}}v_ctlz_zero_undef_i32: -; SI: BUFFER_LOAD_DWORD [[VAL:v[0-9]+]], -; SI: V_FFBH_U32_e32 [[RESULT:v[0-9]+]], [[VAL]] -; SI: BUFFER_STORE_DWORD [[RESULT]], -; SI: S_ENDPGM +; SI: buffer_load_dword [[VAL:v[0-9]+]], +; SI: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]] +; SI: buffer_store_dword [[RESULT]], +; SI: s_endpgm ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+\.[XYZW]]] ; EG: FFBH_UINT {{\*? *}}[[RESULT]] define void @v_ctlz_zero_undef_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { @@ -34,11 +34,11 @@ define void @v_ctlz_zero_undef_i32(i32 addrspace(1)* noalias %out, i32 addrspace } ; FUNC-LABEL: {{^}}v_ctlz_zero_undef_v2i32: -; SI: BUFFER_LOAD_DWORDX2 -; SI: V_FFBH_U32_e32 -; SI: V_FFBH_U32_e32 -; SI: BUFFER_STORE_DWORDX2 -; SI: S_ENDPGM +; SI: buffer_load_dwordx2 +; SI: v_ffbh_u32_e32 +; SI: v_ffbh_u32_e32 +; SI: buffer_store_dwordx2 +; SI: s_endpgm ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+]]{{\.[XYZW]}} ; EG: FFBH_UINT {{\*? *}}[[RESULT]] ; EG: FFBH_UINT {{\*? *}}[[RESULT]] @@ -50,13 +50,13 @@ define void @v_ctlz_zero_undef_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x } ; FUNC-LABEL: {{^}}v_ctlz_zero_undef_v4i32: -; SI: BUFFER_LOAD_DWORDX4 -; SI: V_FFBH_U32_e32 -; SI: V_FFBH_U32_e32 -; SI: V_FFBH_U32_e32 -; SI: V_FFBH_U32_e32 -; SI: BUFFER_STORE_DWORDX4 -; SI: S_ENDPGM +; SI: buffer_load_dwordx4 +; SI: v_ffbh_u32_e32 +; SI: v_ffbh_u32_e32 +; SI: v_ffbh_u32_e32 +; SI: v_ffbh_u32_e32 +; SI: buffer_store_dwordx4 +; SI: s_endpgm ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+]]{{\.[XYZW]}} ; EG: FFBH_UINT {{\*? *}}[[RESULT]] ; EG: FFBH_UINT {{\*? *}}[[RESULT]] |