diff options
Diffstat (limited to 'test/CodeGen/R600/add_i64.ll')
| -rw-r--r-- | test/CodeGen/R600/add_i64.ll | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/test/CodeGen/R600/add_i64.ll b/test/CodeGen/R600/add_i64.ll index 0e3789e4c02..47ecf6d8774 100644 --- a/test/CodeGen/R600/add_i64.ll +++ b/test/CodeGen/R600/add_i64.ll @@ -4,8 +4,8 @@ declare i32 @llvm.r600.read.tidig.x() readnone ; SI-LABEL: {{^}}test_i64_vreg: -; SI: V_ADD_I32 -; SI: V_ADDC_U32 +; SI: v_add_i32 +; SI: v_addc_u32 define void @test_i64_vreg(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %inA, i64 addrspace(1)* noalias %inB) { %tid = call i32 @llvm.r600.read.tidig.x() readnone %a_ptr = getelementptr i64 addrspace(1)* %inA, i32 %tid @@ -19,8 +19,8 @@ define void @test_i64_vreg(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noa ; Check that the SGPR add operand is correctly moved to a VGPR. ; SI-LABEL: {{^}}sgpr_operand: -; SI: V_ADD_I32 -; SI: V_ADDC_U32 +; SI: v_add_i32 +; SI: v_addc_u32 define void @sgpr_operand(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in, i64 addrspace(1)* noalias %in_bar, i64 %a) { %foo = load i64 addrspace(1)* %in, align 8 %result = add i64 %foo, %a @@ -32,8 +32,8 @@ define void @sgpr_operand(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noal ; SGPR as other operand. ; ; SI-LABEL: {{^}}sgpr_operand_reversed: -; SI: V_ADD_I32 -; SI: V_ADDC_U32 +; SI: v_add_i32 +; SI: v_addc_u32 define void @sgpr_operand_reversed(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in, i64 %a) { %foo = load i64 addrspace(1)* %in, align 8 %result = add i64 %a, %foo @@ -43,10 +43,10 @@ define void @sgpr_operand_reversed(i64 addrspace(1)* noalias %out, i64 addrspace ; SI-LABEL: {{^}}test_v2i64_sreg: -; SI: S_ADD_U32 -; SI: S_ADDC_U32 -; SI: S_ADD_U32 -; SI: S_ADDC_U32 +; SI: s_add_u32 +; SI: s_addc_u32 +; SI: s_add_u32 +; SI: s_addc_u32 define void @test_v2i64_sreg(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %a, <2 x i64> %b) { %result = add <2 x i64> %a, %b store <2 x i64> %result, <2 x i64> addrspace(1)* %out @@ -54,10 +54,10 @@ define void @test_v2i64_sreg(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %a, } ; SI-LABEL: {{^}}test_v2i64_vreg: -; SI: V_ADD_I32 -; SI: V_ADDC_U32 -; SI: V_ADD_I32 -; SI: V_ADDC_U32 +; SI: v_add_i32 +; SI: v_addc_u32 +; SI: v_add_i32 +; SI: v_addc_u32 define void @test_v2i64_vreg(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %inA, <2 x i64> addrspace(1)* noalias %inB) { %tid = call i32 @llvm.r600.read.tidig.x() readnone %a_ptr = getelementptr <2 x i64> addrspace(1)* %inA, i32 %tid @@ -70,12 +70,12 @@ define void @test_v2i64_vreg(<2 x i64> addrspace(1)* noalias %out, <2 x i64> add } ; SI-LABEL: {{^}}trunc_i64_add_to_i32: -; SI: S_LOAD_DWORD s[[SREG0:[0-9]+]] -; SI: S_LOAD_DWORD s[[SREG1:[0-9]+]] -; SI: S_ADD_I32 [[SRESULT:s[0-9]+]], s[[SREG1]], s[[SREG0]] -; SI-NOT: ADDC -; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] -; SI: BUFFER_STORE_DWORD [[VRESULT]], +; SI: s_load_dword s[[SREG0:[0-9]+]] +; SI: s_load_dword s[[SREG1:[0-9]+]] +; SI: s_add_i32 [[SRESULT:s[0-9]+]], s[[SREG1]], s[[SREG0]] +; SI-NOT: addc +; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] +; SI: buffer_store_dword [[VRESULT]], define void @trunc_i64_add_to_i32(i32 addrspace(1)* %out, i64 %a, i64 %b) { %add = add i64 %b, %a %trunc = trunc i64 %add to i32 |