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-rw-r--r--lib/Target/ARM/ARMTargetMachine.cpp8
-rw-r--r--lib/Target/Alpha/AlphaTargetMachine.cpp6
-rw-r--r--lib/Target/CBackend/CBackend.cpp6
-rw-r--r--lib/Target/CellSPU/SPUISelDAGToDAG.cpp4
-rw-r--r--lib/Target/CppBackend/CPPBackend.cpp6
-rw-r--r--lib/Target/IA64/IA64TargetMachine.cpp4
-rw-r--r--lib/Target/MSIL/MSILWriter.cpp2
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp6
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp4
-rw-r--r--lib/Target/PowerPC/PPCTargetMachine.cpp12
-rw-r--r--lib/Target/Sparc/SparcTargetMachine.cpp6
-rw-r--r--lib/Target/TargetData.cpp15
-rw-r--r--lib/Target/TargetMachine.cpp221
-rw-r--r--lib/Target/X86/X86Subtarget.cpp2
-rw-r--r--lib/Target/X86/X86TargetMachine.cpp12
15 files changed, 155 insertions, 159 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index d084fffa22f..913ebe0fa5e 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -27,11 +27,9 @@ static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
cl::desc("Disable if-conversion pass"));
-namespace {
- // Register the target.
- RegisterTarget<ARMTargetMachine> X("arm", " ARM");
- RegisterTarget<ThumbTargetMachine> Y("thumb", " Thumb");
-}
+// Register the target.
+static RegisterTarget<ARMTargetMachine> X("arm", " ARM");
+static RegisterTarget<ThumbTargetMachine> Y("thumb", " Thumb");
/// ThumbTargetMachine - Create an Thumb architecture model.
///
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index 0887b952bb5..e986a64c090 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -20,10 +20,8 @@
using namespace llvm;
-namespace {
- // Register the targets
- RegisterTarget<AlphaTargetMachine> X("alpha", " Alpha (incomplete)");
-}
+// Register the targets
+static RegisterTarget<AlphaTargetMachine> X("alpha", " Alpha (incomplete)");
const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
return new AlphaTargetAsmInfo(*this);
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index d6ccefc8467..dcc920a64c2 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -47,10 +47,10 @@
#include <sstream>
using namespace llvm;
-namespace {
- // Register the target.
- RegisterTarget<CTargetMachine> X("c", " C backend");
+// Register the target.
+static RegisterTarget<CTargetMachine> X("c", " C backend");
+namespace {
/// CBackendNameAllUsedStructsAndMergeFunctions - This pass inserts names for
/// any unnamed structure types that are used by the program, and merges
/// external functions with the same name.
diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index 49a5e864d3e..c6628aca63a 100644
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -214,6 +214,8 @@ namespace {
}
}
+namespace {
+
//===--------------------------------------------------------------------===//
/// SPUDAGToDAGISel - Cell SPU-specific code to select SPU machine
/// instructions for SelectionDAG operations.
@@ -336,6 +338,8 @@ public:
#include "SPUGenDAGISel.inc"
};
+}
+
/// InstructionSelectBasicBlock - This callback is invoked by
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
void
diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp
index b42001fa284..2ba5fa66808 100644
--- a/lib/Target/CppBackend/CPPBackend.cpp
+++ b/lib/Target/CppBackend/CPPBackend.cpp
@@ -70,10 +70,10 @@ static cl::opt<std::string> NameToGenerate("cppfor", cl::Optional,
cl::desc("Specify the name of the thing to generate"),
cl::init("!bad!"));
-namespace {
- // Register the target.
- RegisterTarget<CPPTargetMachine> X("cpp", " C++ backend");
+// Register the target.
+static RegisterTarget<CPPTargetMachine> X("cpp", " C++ backend");
+namespace {
typedef std::vector<const Type*> TypeList;
typedef std::map<const Type*,std::string> TypeMap;
typedef std::map<const Value*,std::string> ValueMap;
diff --git a/lib/Target/IA64/IA64TargetMachine.cpp b/lib/Target/IA64/IA64TargetMachine.cpp
index d472b5cc5c7..7a0e4567bc0 100644
--- a/lib/Target/IA64/IA64TargetMachine.cpp
+++ b/lib/Target/IA64/IA64TargetMachine.cpp
@@ -26,9 +26,7 @@ using namespace llvm;
extern "C" int IA64TargetMachineModule;
int IA64TargetMachineModule = 0;
-namespace {
- RegisterTarget<IA64TargetMachine> X("ia64", " IA-64 (Itanium)");
-}
+static RegisterTarget<IA64TargetMachine> X("ia64", " IA-64 (Itanium)");
const TargetAsmInfo *IA64TargetMachine::createTargetAsmInfo() const {
return new IA64TargetAsmInfo(*this);
diff --git a/lib/Target/MSIL/MSILWriter.cpp b/lib/Target/MSIL/MSILWriter.cpp
index 187dd4a8af4..2b7e69e4de0 100644
--- a/lib/Target/MSIL/MSILWriter.cpp
+++ b/lib/Target/MSIL/MSILWriter.cpp
@@ -46,7 +46,7 @@ namespace {
}
-RegisterTarget<MSILTarget> X("msil", " MSIL backend");
+static RegisterTarget<MSILTarget> X("msil", " MSIL backend");
bool MSILModule::runOnModule(Module &M) {
ModulePtr = &M;
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 09e058f34f3..40de5dff1b5 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -19,10 +19,8 @@
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
-namespace {
- // Register the target.
- RegisterTarget<MipsTargetMachine> X("mips", " Mips");
-}
+// Register the target.
+static RegisterTarget<MipsTargetMachine> X("mips", " Mips");
const TargetAsmInfo *MipsTargetMachine::
createTargetAsmInfo() const
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 37b8e7bb114..097e256c4a3 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1920,6 +1920,8 @@ static SDNode *isBLACompatibleAddress(SDOperand Op, SelectionDAG &DAG) {
DAG.getTargetLoweringInfo().getPointerTy()).Val;
}
+namespace {
+
struct TailCallArgumentInfo {
SDOperand Arg;
SDOperand FrameIdxOp;
@@ -1928,6 +1930,8 @@ struct TailCallArgumentInfo {
TailCallArgumentInfo() : FrameIdx(0) {}
};
+}
+
/// StoreTailCallArgumentsToStackSlot - Stores arguments to their stack slot.
static void
StoreTailCallArgumentsToStackSlot(SelectionDAG &DAG,
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index a77cc15d8f8..cfec534ac20 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -19,13 +19,11 @@
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
-namespace {
- // Register the targets
- RegisterTarget<PPC32TargetMachine>
- X("ppc32", " PowerPC 32");
- RegisterTarget<PPC64TargetMachine>
- Y("ppc64", " PowerPC 64");
-}
+// Register the targets
+static RegisterTarget<PPC32TargetMachine>
+X("ppc32", " PowerPC 32");
+static RegisterTarget<PPC64TargetMachine>
+Y("ppc64", " PowerPC 64");
const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
if (Subtarget.isDarwin())
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index 38f6d6a9014..a916b5c8ebd 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -18,10 +18,8 @@
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
-namespace {
- // Register the target.
- RegisterTarget<SparcTargetMachine> X("sparc", " SPARC");
-}
+// Register the target.
+static RegisterTarget<SparcTargetMachine> X("sparc", " SPARC");
const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
return new SparcTargetAsmInfo(*this);
diff --git a/lib/Target/TargetData.cpp b/lib/Target/TargetData.cpp
index 215a4f6d388..69a8ca902b4 100644
--- a/lib/Target/TargetData.cpp
+++ b/lib/Target/TargetData.cpp
@@ -30,11 +30,10 @@
using namespace llvm;
// Handle the Pass registration stuff necessary to use TargetData's.
-namespace {
- // Register the default SparcV9 implementation...
- RegisterPass<TargetData> X("targetdata", "Target Data Layout", false,
- true);
-}
+
+// Register the default SparcV9 implementation...
+static RegisterPass<TargetData> X("targetdata", "Target Data Layout", false,
+ true);
char TargetData::ID = 0;
//===----------------------------------------------------------------------===//
@@ -318,6 +317,8 @@ unsigned TargetData::getAlignmentInfo(AlignTypeEnum AlignType,
: Alignments[BestMatchIdx].PrefAlign;
}
+namespace {
+
/// LayoutInfo - The lazy cache of structure layout information maintained by
/// TargetData. Note that the struct types must have been free'd before
/// llvm_shutdown is called (and thus this is deallocated) because all the
@@ -342,8 +343,10 @@ struct DenseMapLayoutKeyInfo {
};
typedef DenseMap<LayoutKey, StructLayout*, DenseMapLayoutKeyInfo> LayoutInfoTy;
-static ManagedStatic<LayoutInfoTy> LayoutInfo;
+}
+
+static ManagedStatic<LayoutInfoTy> LayoutInfo;
TargetData::~TargetData() {
if (LayoutInfo.isConstructed()) {
diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 1065b095bc8..6e8831bf1f9 100644
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -39,117 +39,116 @@ namespace llvm {
bool RealignStack;
unsigned StackAlignment;
}
-namespace {
- static cl::opt<bool, true> PrintCode("print-machineinstrs",
- cl::desc("Print generated machine code"),
- cl::location(PrintMachineCode), cl::init(false));
-
- static cl::opt<bool, true>
- DisableFPElim("disable-fp-elim",
- cl::desc("Disable frame pointer elimination optimization"),
- cl::location(NoFramePointerElim),
- cl::init(false));
- static cl::opt<bool, true>
- DisableExcessPrecision("disable-excess-fp-precision",
- cl::desc("Disable optimizations that may increase FP precision"),
- cl::location(NoExcessFPPrecision),
- cl::init(false));
- static cl::opt<bool, true>
- EnableUnsafeFPMath("enable-unsafe-fp-math",
- cl::desc("Enable optimizations that may decrease FP precision"),
- cl::location(UnsafeFPMath),
- cl::init(false));
- static cl::opt<bool, true>
- EnableFiniteOnlyFPMath("enable-finite-only-fp-math",
- cl::desc("Enable optimizations that assumes non- NaNs / +-Infs"),
- cl::location(FiniteOnlyFPMathOption),
- cl::init(false));
- static cl::opt<bool, true>
- EnableHonorSignDependentRoundingFPMath(cl::Hidden,
- "enable-sign-dependent-rounding-fp-math",
- cl::desc("Force codegen to assume rounding mode can change dynamically"),
- cl::location(HonorSignDependentRoundingFPMathOption),
- cl::init(false));
-
- static cl::opt<bool, true>
- GenerateSoftFloatCalls("soft-float",
- cl::desc("Generate software floating point library calls"),
- cl::location(UseSoftFloat),
- cl::init(false));
- static cl::opt<bool, true>
- DontPlaceZerosInBSS("nozero-initialized-in-bss",
- cl::desc("Don't place zero-initialized symbols into bss section"),
- cl::location(NoZerosInBSS),
- cl::init(false));
- static cl::opt<bool, true>
- EnableExceptionHandling("enable-eh",
- cl::desc("Emit DWARF exception handling (default if target supports)"),
- cl::location(ExceptionHandling),
- cl::init(false));
- static cl::opt<bool, true>
- EnableUnwindTables("unwind-tables",
- cl::desc("Generate unwinding tables for all functions"),
- cl::location(UnwindTablesMandatory),
- cl::init(false));
-
- static cl::opt<llvm::Reloc::Model, true>
- DefRelocationModel(
- "relocation-model",
- cl::desc("Choose relocation model"),
- cl::location(RelocationModel),
- cl::init(Reloc::Default),
- cl::values(
- clEnumValN(Reloc::Default, "default",
- " Target default relocation model"),
- clEnumValN(Reloc::Static, "static",
- " Non-relocatable code"),
- clEnumValN(Reloc::PIC_, "pic",
- " Fully relocatable, position independent code"),
- clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
- " Relocatable external references, non-relocatable code"),
- clEnumValEnd));
- static cl::opt<llvm::CodeModel::Model, true>
- DefCodeModel(
- "code-model",
- cl::desc("Choose code model"),
- cl::location(CMModel),
- cl::init(CodeModel::Default),
- cl::values(
- clEnumValN(CodeModel::Default, "default",
- " Target default code model"),
- clEnumValN(CodeModel::Small, "small",
- " Small code model"),
- clEnumValN(CodeModel::Kernel, "kernel",
- " Kernel code model"),
- clEnumValN(CodeModel::Medium, "medium",
- " Medium code model"),
- clEnumValN(CodeModel::Large, "large",
- " Large code model"),
- clEnumValEnd));
-
- static cl::opt<bool, true>
- EnablePerformTailCallOpt("tailcallopt",
- cl::desc("Turn on tail call optimization."),
- cl::location(PerformTailCallOpt),
- cl::init(false));
- static cl::opt<bool, true>
- EnableOptimizeForSize("optimize-size",
- cl::desc("Optimize for size."),
- cl::location(OptimizeForSize),
- cl::init(false));
-
- static cl::opt<bool, true>
- EnableRealignStack("realign-stack",
- cl::desc("Realign stack if needed"),
- cl::location(RealignStack),
- cl::init(true));
-
- static cl::opt<unsigned, true>
- OverrideStackAlignment("stack-alignment",
- cl::desc("Override default stack alignment"),
- cl::location(StackAlignment),
- cl::init(0));
-}
+
+static cl::opt<bool, true> PrintCode("print-machineinstrs",
+ cl::desc("Print generated machine code"),
+ cl::location(PrintMachineCode), cl::init(false));
+
+static cl::opt<bool, true>
+ DisableFPElim("disable-fp-elim",
+ cl::desc("Disable frame pointer elimination optimization"),
+ cl::location(NoFramePointerElim),
+ cl::init(false));
+static cl::opt<bool, true>
+DisableExcessPrecision("disable-excess-fp-precision",
+ cl::desc("Disable optimizations that may increase FP precision"),
+ cl::location(NoExcessFPPrecision),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableUnsafeFPMath("enable-unsafe-fp-math",
+ cl::desc("Enable optimizations that may decrease FP precision"),
+ cl::location(UnsafeFPMath),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableFiniteOnlyFPMath("enable-finite-only-fp-math",
+ cl::desc("Enable optimizations that assumes non- NaNs / +-Infs"),
+ cl::location(FiniteOnlyFPMathOption),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableHonorSignDependentRoundingFPMath(cl::Hidden,
+ "enable-sign-dependent-rounding-fp-math",
+ cl::desc("Force codegen to assume rounding mode can change dynamically"),
+ cl::location(HonorSignDependentRoundingFPMathOption),
+ cl::init(false));
+
+static cl::opt<bool, true>
+GenerateSoftFloatCalls("soft-float",
+ cl::desc("Generate software floating point library calls"),
+ cl::location(UseSoftFloat),
+ cl::init(false));
+static cl::opt<bool, true>
+DontPlaceZerosInBSS("nozero-initialized-in-bss",
+ cl::desc("Don't place zero-initialized symbols into bss section"),
+ cl::location(NoZerosInBSS),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableExceptionHandling("enable-eh",
+ cl::desc("Emit DWARF exception handling (default if target supports)"),
+ cl::location(ExceptionHandling),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableUnwindTables("unwind-tables",
+ cl::desc("Generate unwinding tables for all functions"),
+ cl::location(UnwindTablesMandatory),
+ cl::init(false));
+
+static cl::opt<llvm::Reloc::Model, true>
+DefRelocationModel(
+ "relocation-model",
+ cl::desc("Choose relocation model"),
+ cl::location(RelocationModel),
+ cl::init(Reloc::Default),
+ cl::values(
+ clEnumValN(Reloc::Default, "default",
+ " Target default relocation model"),
+ clEnumValN(Reloc::Static, "static",
+ " Non-relocatable code"),
+ clEnumValN(Reloc::PIC_, "pic",
+ " Fully relocatable, position independent code"),
+ clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
+ " Relocatable external references, non-relocatable code"),
+ clEnumValEnd));
+static cl::opt<llvm::CodeModel::Model, true>
+DefCodeModel(
+ "code-model",
+ cl::desc("Choose code model"),
+ cl::location(CMModel),
+ cl::init(CodeModel::Default),
+ cl::values(
+ clEnumValN(CodeModel::Default, "default",
+ " Target default code model"),
+ clEnumValN(CodeModel::Small, "small",
+ " Small code model"),
+ clEnumValN(CodeModel::Kernel, "kernel",
+ " Kernel code model"),
+ clEnumValN(CodeModel::Medium, "medium",
+ " Medium code model"),
+ clEnumValN(CodeModel::Large, "large",
+ " Large code model"),
+ clEnumValEnd));
+
+static cl::opt<bool, true>
+EnablePerformTailCallOpt("tailcallopt",
+ cl::desc("Turn on tail call optimization."),
+ cl::location(PerformTailCallOpt),
+ cl::init(false));
+static cl::opt<bool, true>
+EnableOptimizeForSize("optimize-size",
+ cl::desc("Optimize for size."),
+ cl::location(OptimizeForSize),
+ cl::init(false));
+
+static cl::opt<bool, true>
+EnableRealignStack("realign-stack",
+ cl::desc("Realign stack if needed"),
+ cl::location(RealignStack),
+ cl::init(true));
+
+static cl::opt<unsigned, true>
+OverrideStackAlignment("stack-alignment",
+ cl::desc("Override default stack alignment"),
+ cl::location(StackAlignment),
+ cl::init(0));
//---------------------------------------------------------------------------
// TargetMachine Class
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index c0040779a9a..98d80c84a0a 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -19,7 +19,7 @@
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
-cl::opt<X86Subtarget::AsmWriterFlavorTy>
+static cl::opt<X86Subtarget::AsmWriterFlavorTy>
AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
cl::desc("Choose style of code to emit from X86 backend:"),
cl::values(
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 218f356b921..a60ce09ab9c 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -30,13 +30,11 @@ using namespace llvm;
extern "C" int X86TargetMachineModule;
int X86TargetMachineModule = 0;
-namespace {
- // Register the target.
- RegisterTarget<X86_32TargetMachine>
- X("x86", " 32-bit X86: Pentium-Pro and above");
- RegisterTarget<X86_64TargetMachine>
- Y("x86-64", " 64-bit X86: EM64T and AMD64");
-}
+// Register the target.
+static RegisterTarget<X86_32TargetMachine>
+X("x86", " 32-bit X86: Pentium-Pro and above");
+static RegisterTarget<X86_64TargetMachine>
+Y("x86-64", " 64-bit X86: EM64T and AMD64");
const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
return new X86TargetAsmInfo(*this);
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-20 19:40:10 +0000