diff options
| author | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:43:20 +0000 |
|---|---|---|
| committer | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:43:20 +0000 |
| commit | 47c311bafef032f8133b15f200655da21c9b357d (patch) | |
| tree | a8dd50d321c75abb08f1b7671f0f50bb3bca39af /lib/Target/ARM64/ARM64InstrFormats.td | |
| parent | 8acef8d96d5b5abfa5ce5e5d7d7519a81d8bc187 (diff) | |
[ARM64] Floating point to fixed point scaled conversions are only available on fcvtzs and fcvtzu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205878 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM64/ARM64InstrFormats.td')
| -rw-r--r-- | lib/Target/ARM64/ARM64InstrFormats.td | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/ARM64/ARM64InstrFormats.td b/lib/Target/ARM64/ARM64InstrFormats.td index 00658edefa5..f4ad842f242 100644 --- a/lib/Target/ARM64/ARM64InstrFormats.td +++ b/lib/Target/ARM64/ARM64InstrFormats.td @@ -3044,7 +3044,7 @@ class BaseFPToIntegerUnscaled<bits<2> type, bits<2> rmode, bits<3> opcode, Sched<[WriteFCvt]> { bits<5> Rd; bits<5> Rn; - let Inst{30} = 0; + let Inst{30-29} = 0b00; let Inst{28-24} = 0b11110; let Inst{23-22} = type; let Inst{21} = 1; @@ -3076,7 +3076,8 @@ class BaseFPToInteger<bits<2> type, bits<2> rmode, bits<3> opcode, let Inst{4-0} = Rd; } -multiclass FPToInteger<bits<2> rmode, bits<3> opcode, string asm, SDPatternOperator OpN> { +multiclass FPToIntegerUnscaled<bits<2> rmode, bits<3> opcode, string asm, + SDPatternOperator OpN> { // Unscaled single-precision to 32-bit def UWSr : BaseFPToIntegerUnscaled<0b00, rmode, opcode, FPR32, GPR32, asm, [(set GPR32:$Rd, (OpN FPR32:$Rn))]> { @@ -3100,7 +3101,10 @@ multiclass FPToInteger<bits<2> rmode, bits<3> opcode, string asm, SDPatternOpera [(set GPR64:$Rd, (OpN (f64 FPR64:$Rn)))]> { let Inst{31} = 1; // 64-bit GPR flag } +} +multiclass FPToIntegerScaled<bits<2> rmode, bits<3> opcode, string asm, + SDPatternOperator OpN> { // Scaled single-precision to 32-bit def SWSri : BaseFPToInteger<0b00, rmode, opcode, FPR32, GPR32, fixedpoint32, asm> { |