summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorVadim Girlin <vadimgirlin@gmail.com>2012-05-07 17:38:01 +0400
committerTom Stellard <thomas.stellard@amd.com>2012-05-10 09:18:44 -0400
commit31e69bfbae3e1bd0eb9c76d53811f9b93e99836e (patch)
treeeee179a44e16df04d1fb71dee12de116e32e7a6f
parentcd6c689ebed8d75ca66f803de30f6419dfcb4112 (diff)
R600: fix live-in handling for inputs
Set the input registers as live-in for entry basic block. Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
-rw-r--r--lib/Target/AMDIL/AMDGPUUtil.cpp1
-rw-r--r--lib/Target/AMDIL/R600LowerShaderInstructions.cpp4
2 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/AMDIL/AMDGPUUtil.cpp b/lib/Target/AMDIL/AMDGPUUtil.cpp
index 6fb01b687f3..663a77f2645 100644
--- a/lib/Target/AMDIL/AMDGPUUtil.cpp
+++ b/lib/Target/AMDIL/AMDGPUUtil.cpp
@@ -118,6 +118,7 @@ void AMDGPU::utilAddLiveIn(MachineFunction * MF, MachineRegisterInfo & MRI,
{
if (!MRI.isLiveIn(physReg)) {
MRI.addLiveIn(physReg, virtReg);
+ MF->front().addLiveIn(physReg);
BuildMI(MF->front(), MF->front().begin(), DebugLoc(),
TII->get(TargetOpcode::COPY), virtReg)
.addReg(physReg);
diff --git a/lib/Target/AMDIL/R600LowerShaderInstructions.cpp b/lib/Target/AMDIL/R600LowerShaderInstructions.cpp
index 394ee7006ce..742b50fb394 100644
--- a/lib/Target/AMDIL/R600LowerShaderInstructions.cpp
+++ b/lib/Target/AMDIL/R600LowerShaderInstructions.cpp
@@ -13,6 +13,7 @@
#include "AMDGPU.h"
#include "AMDGPULowerShaderInstructions.h"
+#include "AMDGPUUtil.h"
#include "AMDIL.h"
#include "AMDILInstrInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
@@ -117,8 +118,7 @@ void R600LowerShaderInstructionsPass::lowerLOAD_INPUT(MachineInstr &MI)
unsigned newRegister = inputClass->getRegister(inputIndex);
unsigned dstReg = dst.getReg();
- preloadRegister(MI.getParent()->getParent(), TM.getInstrInfo(), newRegister,
- dstReg);
+ AMDGPU::utilAddLiveIn(MI.getParent()->getParent(), *MRI, TM.getInstrInfo(), newRegister, dstReg);
}
bool R600LowerShaderInstructionsPass::lowerSTORE_OUTPUT(MachineInstr &MI,