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authorTom Stellard <thomas.stellard@amd.com>2012-11-09 20:47:36 +0000
committerTom Stellard <thomas.stellard@amd.com>2012-11-16 17:03:33 -0500
commit4ceb0b484e510ac62c074cecff0e8f7e13cd3e95 (patch)
treeb306679961673e124cf87e8c758aff52e8a58f6d
parent18b9f8315e0aff31d00bcf40001e41a1b6a11ff8 (diff)
R600: Fix operand index table for OP3 instructions
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
-rw-r--r--lib/Target/AMDGPU/R600InstrInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/AMDGPU/R600InstrInfo.cpp b/lib/Target/AMDGPU/R600InstrInfo.cpp
index 7c5b19ed3ca..e43731393f3 100644
--- a/lib/Target/AMDGPU/R600InstrInfo.cpp
+++ b/lib/Target/AMDGPU/R600InstrInfo.cpp
@@ -543,7 +543,7 @@ int R600InstrInfo::getOperandIdx(const MachineInstr &MI,
// T M P E D L P 0 N R A 1 N R A 2 N R T D M
{0,-1,-1, 1, 2, 3, 4, 5, 6, 7, 8,-1,-1,-1,-1,-1,-1,-1, 9,10,11},
{0, 1, 2, 3, 4 ,5 ,6 ,7, 8, 9,10,11,12,-1,-1,-1,13,14,15,16,17},
- {0,-1,-1, 1, 2, 3, 4, 5, 6, 7,-1, 8, 9,10,-1,11,12,13,14,15,16}
+ {0,-1,-1,-1,-1, 1, 2, 3, 4, 5,-1, 6, 7, 8,-1, 9,10,11,12,13,14}
};
unsigned TargetFlags = get(MI.getOpcode()).TSFlags;
unsigned OpTableIdx;