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The assembly optimizations were making unsafe assumptions about which address
spaces had which identifiers.
Also, fix vload/vstore with 64-bit pointers. This was broken previously on
Radeon SI.
This version still only has assembly versions of int/uint 2/4/8/16 for global
loads and stores on R600, but it does it in a way that would be very easily
extended to private/local/constant and could also be handled easily on other
architectures.
v2: 1) Leave v[load|store]_impl.ll in generic/lib
2) Remove vload_if.ll and vstore_if.ll interfaces
3) Fix address+offset calculations
3) Remove offset from assembly arg list
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@186416 91177308-0d34-0410-b5e6-96231b3b80d8
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This commit gets us back to pure CLC and fixes offset calculations.
The next commit will re-enable the assembly implementation for R600,
fix bugs related to 64-bit address spaces, and also fix the
incorrect assumption that address space identifiers are the same in
all architectures.
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@186415 91177308-0d34-0410-b5e6-96231b3b80d8
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libclc was defining and undefing GENTYPE and several other macros with
common names in its header files. This was preventing applications from
defining macros with identical names as command line arguments to the
compiler, because the definitions in the header files were masking the
macros defined as compiler arguements.
Reviewed-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185838 91177308-0d34-0410-b5e6-96231b3b80d8
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The assembly should be generic, but at least currently R600 only supports
32-bit stores of [u]int1/4, and I believe that only global is well-supported.
R600 lowers the 8/16 component stores to multiple 4-component stores.
The unoptimized C versions of the other stuff is left in place.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185009 91177308-0d34-0410-b5e6-96231b3b80d8
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The assembly should be generic, but at least currently R600 only supports
32-bit loads of int1/4, and I believe that only global is well-supported.
R600 lowers the 8/16 component vectors to multiple 4-bit loads.
The unoptimized C versions of the other stuff is left in place.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185008 91177308-0d34-0410-b5e6-96231b3b80d8
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Assumes that the target supports byte-addressable stores.
Completely unoptimized.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185007 91177308-0d34-0410-b5e6-96231b3b80d8
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Should work for all targets and data types. Completely unoptimized.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185006 91177308-0d34-0410-b5e6-96231b3b80d8
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For any GENTYPE that isn't scalar, we need to implement a mixed
vector/scalar version of clamp/max.
This depends on the min() patches I sent to the list a few minutes ago.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185003 91177308-0d34-0410-b5e6-96231b3b80d8
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Checks if the current GENTYPE is scalar, and if not, then defines a separate
implementation of the function which casts the second arg to vector before
proceeding.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185002 91177308-0d34-0410-b5e6-96231b3b80d8
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This doesn't handle the integer cases for min(vector, scalar).
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@185001 91177308-0d34-0410-b5e6-96231b3b80d8
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Max(x,y) is available for all integer/floating types.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@184995 91177308-0d34-0410-b5e6-96231b3b80d8
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Created under a new shared/ directory for functions which are available for
both integer and floating point types.
Patch by: Aaron Watry
git-svn-id: https://llvm.org/svn/llvm-project/libclc/trunk@184994 91177308-0d34-0410-b5e6-96231b3b80d8
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