diff options
| -rw-r--r-- | AMD/MSR-Athlon.c | 2 | ||||
| -rw-r--r-- | AMD/MSR-K6.c | 40 | ||||
| -rw-r--r-- | AMD/bluesmoke.c | 82 | ||||
| -rw-r--r-- | AMD/bugs.c | 2 | ||||
| -rw-r--r-- | AMD/dumppsb.c | 48 | ||||
| -rw-r--r-- | AMD/identify.c | 10 | ||||
| -rw-r--r-- | AMD/powernow.c | 18 | ||||
| -rw-r--r-- | Cyrix/identify.c | 12 | ||||
| -rw-r--r-- | IDT/MSR-C3.c | 8 | ||||
| -rw-r--r-- | IDT/identify.c | 6 | ||||
| -rw-r--r-- | IDT/longhaul-v2.c | 34 | ||||
| -rw-r--r-- | IDT/longhaul.c | 34 | ||||
| -rw-r--r-- | IDT/powersaver.c | 48 | ||||
| -rw-r--r-- | Intel/MSR-P4.c | 108 | ||||
| -rw-r--r-- | Intel/MSR-P6.c | 20 | ||||
| -rw-r--r-- | Intel/MSR-PM.c | 20 | ||||
| -rw-r--r-- | Intel/bluesmoke.c | 86 | ||||
| -rw-r--r-- | Intel/cachesize.c | 29 | ||||
| -rw-r--r-- | Intel/eblcr.c | 10 | ||||
| -rw-r--r-- | Intel/identify.c | 14 | ||||
| -rw-r--r-- | Intel/info.c | 12 | ||||
| -rw-r--r-- | Intel/microcode.c | 8 | ||||
| -rw-r--r-- | NatSemi/identify.c | 4 | ||||
| -rw-r--r-- | RiSE/identify.c | 4 | ||||
| -rw-r--r-- | SiS/identify.c | 4 | ||||
| -rw-r--r-- | bench/MHz.c | 4 | ||||
| -rw-r--r-- | binary.c | 16 | ||||
| -rw-r--r-- | cpuid.c | 6 | ||||
| -rw-r--r-- | features.c | 28 | ||||
| -rw-r--r-- | havecpuid.c | 2 | ||||
| -rw-r--r-- | identify.c | 16 | ||||
| -rw-r--r-- | mptable.c | 36 | ||||
| -rw-r--r-- | mtrr.c | 40 | ||||
| -rw-r--r-- | rdmsr.c | 24 | ||||
| -rw-r--r-- | x86info.c | 52 |
35 files changed, 440 insertions, 447 deletions
diff --git a/AMD/MSR-Athlon.c b/AMD/MSR-Athlon.c index 3327303..ec9df6e 100644 --- a/AMD/MSR-Athlon.c +++ b/AMD/MSR-Athlon.c @@ -22,5 +22,5 @@ void dump_athlon_MSR(struct cpudata *cpu) dumpmsr(cpu->number, 0xC0010010, 32); dumpmsr(cpu->number, 0xC0010015, 32); dumpmsr(cpu->number, MSR_CLKCTL, 32); - printf ("\n"); + printf("\n"); } diff --git a/AMD/MSR-K6.c b/AMD/MSR-K6.c index 9a18638..5db73e2 100644 --- a/AMD/MSR-K6.c +++ b/AMD/MSR-K6.c @@ -23,53 +23,53 @@ void dump_k6_MSR (struct cpudata *cpu) dumpmsr(cpu->number, 0xC0000082, 32); /* Original K6 or K6-2 (old core). */ - if ((cpu->model < 8) || ((cpu->model==8) && (cpu->stepping <8))) { + if ((cpu->model < 8) || ((cpu->model == 8) && (cpu->stepping < 8))) { if (read_msr (cpu->number, 0xC0000082, &val) == 1) { - printf ("Write allocate enable limit: %dMbytes\n", (int) ((val & 0x7e) >>1) * 4); - printf ("Write allocate 15-16M bytes: %s\n", val & 1 ? "enabled" : "disabled"); + printf("Write allocate enable limit: %dMbytes\n", (int) ((val & 0x7e) >>1) * 4); + printf("Write allocate 15-16M bytes: %s\n", val & 1 ? "enabled" : "disabled"); } else { - printf ("Couldn't read WHCR register.\n"); + printf("Couldn't read WHCR register.\n"); } } /* K6-2 core (Stepping 8-F), K6-III or later. */ - if ((cpu->model > 8) || ((cpu->model==8) && (cpu->stepping>=8))) { + if ((cpu->model > 8) || ((cpu->model == 8) && (cpu->stepping >= 8))) { if (read_msr (cpu->number, 0xC0000082, &val) == 1) { if (!(val & (0x3ff << 22))) - printf ("Write allocate disabled\n"); + printf("Write allocate disabled\n"); else { - printf ("Write allocate enable limit: %dMbytes\n", (int) ((val >> 22) & 0x3ff) * 4); - printf ("Write allocate 15-16M bytes: %s\n", val & (1<<16) ? "enabled" : "disabled"); + printf("Write allocate enable limit: %dMbytes\n", (int) ((val >> 22) & 0x3ff) * 4); + printf("Write allocate 15-16M bytes: %s\n", val & (1<<16) ? "enabled" : "disabled"); } } else { - printf ("Couldn't read WHCR register.\n"); + printf("Couldn't read WHCR register.\n"); } } /* Dump EWBE register on K6-2 & K6-3 */ - if ((cpu->family==5) && (cpu->model>=8)) { + if ((cpu->family == 5) && (cpu->model >= 8)) { if (read_msr (cpu->number, 0xC0000080, &val) == 1) { if (val & (1<<0)) - printf ("System call extension present.\n"); + printf("System call extension present.\n"); if (val & (1<<1)) - printf ("Data prefetch enabled.\n"); + printf("Data prefetch enabled.\n"); else - printf ("Data prefetch disabled.\n"); - printf ("EWBE mode: "); + printf("Data prefetch disabled.\n"); + printf("EWBE mode: "); switch ((val & (1<<2|1<<3|1<<4))>>2) { - case 0: printf ("strong ordering (slowest performance)\n"); + case 0: printf("strong ordering (slowest performance)\n"); break; - case 1: printf ("speculative disable (close to best performance)\n"); + case 1: printf("speculative disable (close to best performance)\n"); break; - case 2: printf ("invalid\n"); + case 2: printf("invalid\n"); break; - case 3: printf ("global disable (best performance)\n"); + case 3: printf("global disable (best performance)\n"); break; } } else { - printf ("Couldn't read EFER register.\n"); + printf("Couldn't read EFER register.\n"); } } - printf ("\n"); + printf("\n"); } diff --git a/AMD/bluesmoke.c b/AMD/bluesmoke.c index 1c132ab..5a3701b 100644 --- a/AMD/bluesmoke.c +++ b/AMD/bluesmoke.c @@ -32,87 +32,87 @@ void decode_athlon_bluesmoke(int cpunum) return; if ((val & (1<<8)) == 0) - printf ("Erk, MCG_CTL not present! :%016llx:\n", val); + printf("Erk, MCG_CTL not present! :%016llx:\n", val); banks = val & 0xf; - printf ("Number of reporting banks : %d\n\n", banks); + printf("Number of reporting banks : %d\n\n", banks); if (read_msr(cpunum, MCG_STATUS, &val) == 1) { if (val != 0) { printf(" 31 23 15 7 \n"); - printf ("MCG_STATUS: "); + printf("MCG_STATUS: "); dumpmsr_bin (cpunum, MCG_STATUS, 32); } } if (read_msr(cpunum, MCG_CTL, &val) == 1) { - printf ("MCG_CTL:\n"); + printf("MCG_CTL:\n"); - printf (" Data cache check %sabled\n", val & (1<<0) ? "en" : "dis"); + printf(" Data cache check %sabled\n", val & (1<<0) ? "en" : "dis"); if ((val & (1<<0)) == 1) { if (read_msr(cpunum, MC_CTL, &val2) == 1) { - printf (" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); - printf (" Data cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); - printf (" Data cache main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); - printf (" Data cache snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); - printf (" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); - printf (" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); + printf(" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" Data cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); + printf(" Data cache main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); + printf(" Data cache snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); + printf(" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); + printf(" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); } } - printf (" Instruction cache check %sabled\n", val & (1<<1) ? "en" : "dis"); + printf(" Instruction cache check %sabled\n", val & (1<<1) ? "en" : "dis"); if (((val & (1<<1)) == 2) && (banks>1)) { if (read_msr(cpunum, MC_CTL+4, &val2) == 1) { - printf (" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); - printf (" Instruction cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); - printf (" IC main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); - printf (" IC snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); - printf (" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); - printf (" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); - printf (" Predecode array parity %sabled\n", val2 & (1<<7) ? "en" : "dis"); - printf (" Target selector parity %sabled\n", val2 & (1<<8) ? "en" : "dis"); - printf (" Read data error %sabled\n", val2 & (1<<9) ? "en" : "dis"); + printf(" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" Instruction cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); + printf(" IC main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); + printf(" IC snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); + printf(" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); + printf(" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); + printf(" Predecode array parity %sabled\n", val2 & (1<<7) ? "en" : "dis"); + printf(" Target selector parity %sabled\n", val2 & (1<<8) ? "en" : "dis"); + printf(" Read data error %sabled\n", val2 & (1<<9) ? "en" : "dis"); } } - printf (" Bus unit check %sabled\n", val & (1<<2) ? "en" : "dis"); + printf(" Bus unit check %sabled\n", val & (1<<2) ? "en" : "dis"); if ((val & (1<<2)) == 4 && (banks>2)) { if (read_msr(cpunum, MC_CTL+8, &val2) == 1) { - printf (" External L2 tag parity error %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" L2 partial tag parity error %sabled\n", val2 & (1<<1) ? "en" : "dis"); - printf (" System ECC TLB reload error %sabled\n", val2 & (1<<2) ? "en" : "dis"); - printf (" L2 ECC TLB reload error %sabled\n", val2 & (1<<3) ? "en" : "dis"); - printf (" L2 ECC K7 deallocate %sabled\n", val2 & (1<<4) ? "en" : "dis"); - printf (" L2 ECC probe deallocate %sabled\n", val2 & (1<<5) ? "en" : "dis"); - printf (" System datareaderror reporting %sabled\n", val2 & (1<<6) ? "en" : "dis"); + printf(" External L2 tag parity error %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" L2 partial tag parity error %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" System ECC TLB reload error %sabled\n", val2 & (1<<2) ? "en" : "dis"); + printf(" L2 ECC TLB reload error %sabled\n", val2 & (1<<3) ? "en" : "dis"); + printf(" L2 ECC K7 deallocate %sabled\n", val2 & (1<<4) ? "en" : "dis"); + printf(" L2 ECC probe deallocate %sabled\n", val2 & (1<<5) ? "en" : "dis"); + printf(" System datareaderror reporting %sabled\n", val2 & (1<<6) ? "en" : "dis"); } } - printf (" Load/Store unit check %sabled\n", val & (1<<3) ? "en" : "dis"); + printf(" Load/Store unit check %sabled\n", val & (1<<3) ? "en" : "dis"); if ((val & (1<<3)) == 8 && (banks>3)) { if (read_msr(cpunum, MC_CTL+12, &val2) == 1) { - printf (" Read data error enable (loads) %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" Read data error enable (stores) %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" Read data error enable (loads) %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" Read data error enable (stores) %sabled\n", val2 & (1<<1) ? "en" : "dis"); } } } - printf ("\n"); + printf("\n"); printf(" 31 23 15 7 \n"); for (i=0; i<banks; i++) { - printf ("Bank: %u (0x%x)\n", i, (unsigned int)MC_CTL+i*4); - printf ("MC%uCTL: ", i); + printf("Bank: %u (0x%x)\n", i, (unsigned int)MC_CTL+i*4); + printf("MC%uCTL: ", i); dumpmsr_bin (cpunum, MC_CTL+i*4, 32); - printf ("MC%uSTATUS: ", i); + printf("MC%uSTATUS: ", i); dumpmsr_bin (cpunum, MC_STATUS+i*4, 32); - printf ("MC%uADDR: ", i); + printf("MC%uADDR: ", i); dumpmsr_bin (cpunum, MC_ADDR+i*4, 32); - printf ("MC%uMISC: ", i); + printf("MC%uMISC: ", i); dumpmsr_bin (cpunum, MC_MISC+i*4, 32); - printf ("\n"); + printf("\n"); } } @@ -21,7 +21,7 @@ static void show_k7_bugs(struct cpudata *cpu) if (tuple(cpu) > 0x681) { if (read_msr (cpu->number, MSR_CLKCTL, &val) == 1) { if ((val & 0xfff00000) != 0x20000000) { - printf ("CLK_CTL is programmed to %08llx, instead of %08llx\n", + printf("CLK_CTL is programmed to %08llx, instead of %08llx\n", val, ((val&~0xfff00000)|0x20000000)); } } diff --git a/AMD/dumppsb.c b/AMD/dumppsb.c index 5f00a84..8434137 100644 --- a/AMD/dumppsb.c +++ b/AMD/dumppsb.c @@ -48,7 +48,7 @@ void dump_PSB(struct cpudata *cpu, unsigned int maxfid, unsigned int startvid) unsigned int fid, vid; fd=open("/dev/mem", O_RDONLY); - if (fd==-1) { + if (fd == -1) { perror("/dev/mem"); return; } @@ -63,58 +63,58 @@ void dump_PSB(struct cpudata *cpu, unsigned int maxfid, unsigned int startvid) return; } - for (i=0;i<ROMSIZE;i++) { + for (i=0; i<ROMSIZE; i++) { if (memcmp(p, "AMDK7PNOW!", 10) == 0){ - printf ("Found PSB header at %p\n", p); + printf("Found PSB header at %p\n", p); psb = (struct psb_s *) p; - printf ("Table version: 0x%x\n", (unsigned int)psb->tableversion); + printf("Table version: 0x%x\n", (unsigned int)psb->tableversion); if (psb->tableversion != 0x12) { - printf ("Sorry, only v1.2 tables supported right now\n"); + printf("Sorry, only v1.2 tables supported right now\n"); goto out; } - printf ("Flags: 0x%x ", (unsigned int) psb->flags); + printf("Flags: 0x%x ", (unsigned int) psb->flags); if ((psb->flags & 1)==0) { - printf ("(Mobile voltage regulator)\n"); + printf("(Mobile voltage regulator)\n"); } else { - printf ("(Desktop voltage regulator)\n"); + printf("(Desktop voltage regulator)\n"); } - printf ("Settling Time: %d microseconds.\n", + printf("Settling Time: %d microseconds.\n", (int)psb->settlingtime); - printf ("Has %d PST tables. (Only dumping ones relevant to this CPU).\n", + printf("Has %d PST tables. (Only dumping ones relevant to this CPU).\n", (int)psb->numpst); p += sizeof (struct psb_s); pst = (struct pst_s *) p; - for (i = 0 ; i <psb->numpst; i++) { + for (i=0 ; i<psb->numpst; i++) { pst = (struct pst_s *) p; numpstates = pst->numpstates; if ((etuple(cpu) == pst->cpuid) && (maxfid==pst->maxfid) && (startvid==pst->startvid)) { - printf (" PST:%d (@%p)\n", i, pst); - printf (" cpuid: 0x%x\t", pst->cpuid); - printf (" fsb: %d\t", (int)pst->fsbspeed); - printf (" maxFID: 0x%x\t", (unsigned int)pst->maxfid); - printf (" startvid: 0x%x\n", (unsigned int)pst->startvid); - printf (" num of p states in this table: %d\n", numpstates); + printf(" PST:%d (@%p)\n", i, pst); + printf(" cpuid: 0x%x\t", pst->cpuid); + printf(" fsb: %d\t", (int)pst->fsbspeed); + printf(" maxFID: 0x%x\t", (unsigned int)pst->maxfid); + printf(" startvid: 0x%x\n", (unsigned int)pst->startvid); + printf(" num of p states in this table: %d\n", numpstates); p = (char *) pst + sizeof (struct pst_s); - for (j=0 ; j < numpstates; j++) { + for (j=0 ; j<numpstates; j++) { fid = *p++; - printf (" FID: 0x%x (%.1fx [%.0fMHz])\t", fid, + printf(" FID: 0x%x (%.1fx [%.0fMHz])\t", fid, fid_codes[fid], pst->fsbspeed * fid_codes[fid]); vid = *p++; - printf ("VID: 0x%x (%0.3fV)\n", vid, mobile_vid_table[vid]); + printf("VID: 0x%x (%0.3fV)\n", vid, mobile_vid_table[vid]); } - printf ("\n"); + printf("\n"); } else { p = (char *) pst + sizeof (struct pst_s); - for (j=0 ; j < numpstates; j++) + for (j=0 ; j<numpstates; j++) p+=2; } } @@ -124,12 +124,12 @@ void dump_PSB(struct cpudata *cpu, unsigned int maxfid, unsigned int startvid) } out: - if (munmap(p, ROMSIZE)==-1) { + if (munmap(p, ROMSIZE) == -1) { perror("munmap"); exit(EXIT_FAILURE); } - if (close(fd)==-1) { + if (close(fd) == -1) { perror("close"); exit(EXIT_FAILURE); } diff --git a/AMD/identify.c b/AMD/identify.c index d783af3..8e41894 100644 --- a/AMD/identify.c +++ b/AMD/identify.c @@ -31,7 +31,7 @@ static void set_k8_name(struct k8_rev *r, struct cpudata *c) s[0] = 0; cont = 0; - for (i=0; (r!=NULL) && (i<ARRAY_SIZE(k8_names)); i++) { + for (i=0; (r != NULL) && (i<ARRAY_SIZE(k8_names)); i++) { p = NULL; id = 1<<i; if (r->nameid & id) @@ -112,7 +112,7 @@ void set_fam10h_revinfo(int id, struct cpudata *c) { int i; struct fam10h_rev *r = NULL; - + for (i=0; i<ARRAY_SIZE(fam10h_revisions); i++) { if (fam10h_revisions[i].eax == id) { r = &fam10h_revisions[i]; @@ -388,7 +388,7 @@ void Identify_AMD(struct cpudata *cpu) cpu->connector = CONN_SOCKET_3; break; } - + switch (tuple(cpu) & 0xff0) { case 0x430: add_to_cpuname("Am486DX2-WT"); @@ -712,7 +712,7 @@ void display_AMD_info(struct cpudata *cpu) printf("Family: %u Model: %u Stepping: %u\n", family(cpu), model(cpu), cpu->stepping); - printf ("CPU Model : %s\n", cpu->name); + printf("CPU Model : %s\n", cpu->name); get_model_name(cpu); decode_feature_flags(cpu); @@ -777,7 +777,5 @@ void display_AMD_info(struct cpudata *cpu) printf("The physical package has %d of %d " "possible cores implemented.\n", n, p); } - - } diff --git a/AMD/powernow.c b/AMD/powernow.c index b30ec6f..5ddcc0b 100644 --- a/AMD/powernow.c +++ b/AMD/powernow.c @@ -68,9 +68,9 @@ static void decode_fidvid(struct cpudata *cpu) fid_codes[fidvidstatus.bits.SFID], fid_codes[fidvidstatus.bits.CFID]); -// printf ("Voltage ID codes: Maximum=0x%x Startup=0x%x Currently=0x%x\n", +// printf("Voltage ID codes: Maximum=0x%x Startup=0x%x Currently=0x%x\n", // fidvidstatus.MVID, fidvidstatus.SVID, fidvidstatus.CVID); -// printf ("Frequency ID codes: Maximum=0x%x Startup=0x%x Currently=0x%x\n", +// printf("Frequency ID codes: Maximum=0x%x Startup=0x%x Currently=0x%x\n", // fidvidstatus.MFID, fidvidstatus.SFID, fidvidstatus.CFID); if (show_bios) { @@ -102,7 +102,7 @@ static void k8_decode_fidvid(struct cpudata *cpu) printf("\n"); if (read_msr(cpu->number, MSR_FID_VID_STATUS, &fidvidstatus.val) != 1) { - printf ("Something went wrong reading MSR_FID_VID_STATUS\n"); + printf("Something went wrong reading MSR_FID_VID_STATUS\n"); return; } @@ -182,19 +182,19 @@ void decode_powernow(struct cpudata *cpu) can_scale_vid=1; } if (edx & (1<<3)) - printf ("\n\tThermal Trip"); + printf("\n\tThermal Trip"); if (edx & (1<<4)) - printf ("\n\tThermal Monitoring"); + printf("\n\tThermal Monitoring"); if (edx & (1<<5)) - printf ("\n\tSoftware Thermal Control"); + printf("\n\tSoftware Thermal Control"); if (edx & (1<<6)) - printf ("\n\t100MHz multiplier control"); + printf("\n\t100MHz multiplier control"); if (edx & (1<<7)) { - printf ("\n\tHardware P-state control"); + printf("\n\tHardware P-state control"); can_scale_fid = can_scale_vid = 1; } if (edx & (1<<8)) - printf ("\n\tinvariant TSC"); + printf("\n\tinvariant TSC"); if (!(edx & 0x1f)) printf(" None"); printf("\n\n"); diff --git a/Cyrix/identify.c b/Cyrix/identify.c index 478feea..6feca19 100644 --- a/Cyrix/identify.c +++ b/Cyrix/identify.c @@ -21,10 +21,10 @@ void decode_Cyrix_TLB (int x) case 0: break; case 0x70: - printf ("TLB: 32 entries 4-way associative 4KB pages\n"); + printf("TLB: 32 entries 4-way associative 4KB pages\n"); break; case 0x80: - printf ("L1 Cache: 16KB 4-way associative 16 bytes/line\n"); + printf("L1 Cache: 16KB 4-way associative 16 bytes/line\n"); break; } } @@ -89,14 +89,14 @@ void display_Cyrix_info(struct cpudata *cpu) unsigned int i, ntlb; unsigned long eax, ebx, ecx, edx; - printf ("Family: %u Model: %u Stepping: %u\n", + printf("Family: %u Model: %u Stepping: %u\n", cpu->family, cpu->model, cpu->stepping); - printf ("CPU Model : %s\n", cpu->name); + printf("CPU Model : %s\n", cpu->name); get_model_name (cpu); decode_feature_flags (cpu); - printf ("TLB & L1 Cache info\n"); + printf("TLB & L1 Cache info\n"); if (cpu->maxi >= 2 && show_cacheinfo) { /* TLB and L1 Cache info */ ntlb = 255; @@ -117,7 +117,7 @@ void display_Cyrix_info(struct cpudata *cpu) } } - printf ("TLB & L1 Cache info from extended info\n"); + printf("TLB & L1 Cache info from extended info\n"); if (cpu->maxei >= 0x80000005 && show_cacheinfo) { /* TLB and L1 Cache info */ ntlb = 255; diff --git a/IDT/MSR-C3.c b/IDT/MSR-C3.c index c268b38..f05db03 100644 --- a/IDT/MSR-C3.c +++ b/IDT/MSR-C3.c @@ -14,17 +14,17 @@ void dump_C3_MSR (struct cpudata *cpu) if (!user_is_root) return; - printf ("FCR: "); + printf("FCR: "); dumpmsr (cpu->number, 0x1107, 32); - printf ("Power management: "); + printf("Power management: "); if (cpu->model==6 || cpu->model==7) { - printf ("Longhaul\n"); + printf("Longhaul\n"); decode_longhaul(cpu); } if (cpu->model==8 || cpu->model==9) { - printf ("Powersaver\n"); + printf("Powersaver\n"); decode_powersaver(cpu); } } diff --git a/IDT/identify.c b/IDT/identify.c index 1439c5a..efe6389 100644 --- a/IDT/identify.c +++ b/IDT/identify.c @@ -155,10 +155,10 @@ void decode_IDT_cacheinfo(struct cpudata *cpu) cpuid (cpu->number, 0x80000006, &eax, &ebx, &ecx, &edx); if ((cpu->family==6) && (cpu->model==7 || cpu->model==8)) /* Work around errata. */ - printf (" L2 (on CPU) cache: %ldKB %ld-way associative, %ld lines per tag, line size=%ld bytes.\n", + printf(" L2 (on CPU) cache: %ldKB %ld-way associative, %ld lines per tag, line size=%ld bytes.\n", ecx >> 24, (ecx >> 16) & 0x0f, (ecx >> 8) & 0x0f, ecx & 0xff); else - printf (" L2 (on CPU) cache: %ldKB %ld-way associative, %ld lines per tag, line size=%ld bytes.\n", + printf(" L2 (on CPU) cache: %ldKB %ld-way associative, %ld lines per tag, line size=%ld bytes.\n", ecx >> 16, (ecx >> 12) & 0x0f, (ecx >> 8) & 0x0f, ecx & 0xff); } printf("TLB info\n"); @@ -175,7 +175,7 @@ void display_IDT_info(struct cpudata *cpu) { printf("Family: %u Model: %u Stepping: %u\n", cpu->family, cpu->model, cpu->stepping); - printf ("CPU Model : %s\n", cpu->name); + printf("CPU Model : %s\n", cpu->name); get_model_name (cpu); diff --git a/IDT/longhaul-v2.c b/IDT/longhaul-v2.c index 337b535..eb7e2ea 100644 --- a/IDT/longhaul-v2.c +++ b/IDT/longhaul-v2.c @@ -45,40 +45,40 @@ void decode_longhaul2(struct cpudata *cpu) dumpmsr (cpu->number, 0x110A, 64); if (longhaul.bits.RevisionID & 1) - printf ("\tSoftVID support\n"); + printf("\tSoftVID support\n"); if (longhaul.bits.RevisionID & 2) - printf ("\tSoftBSEL support\n"); + printf("\tSoftBSEL support\n"); if (longhaul.bits.RevisionID == 0) - printf ("\tSoftware clock multiplier only: No Softvid\n"); + printf("\tSoftware clock multiplier only: No Softvid\n"); if (longhaul.bits.EnableSoftBusRatio==1) - printf ("\tEnableSoftBusRatio=Enabled\n"); + printf("\tEnableSoftBusRatio=Enabled\n"); if (longhaul.bits.EnableSoftVID==1) - printf ("\tEnableSoftVID=Enabled\n"); + printf("\tEnableSoftVID=Enabled\n"); if (longhaul.bits.EnableSoftBSEL==1) - printf ("\tEnableSoftBSEL=Enabled\n"); + printf("\tEnableSoftBSEL=Enabled\n"); - printf ("\tSoftBusRatio4=%s\n", longhaul.bits.SoftBusRatio4 ? "1" : "0"); - printf ("\tSoftBusRatio="); + printf("\tSoftBusRatio4=%s\n", longhaul.bits.SoftBusRatio4 ? "1" : "0"); + printf("\tSoftBusRatio="); binary (4, longhaul.bits.SoftBusRatio); if (longhaul.bits.RevisionID & 1) - printf ("\tVRM Rev=%s\n", + printf("\tVRM Rev=%s\n", longhaul.bits.VRMRev ? "Mobile VRM" : "VRM 8.5"); - printf ("\tMaxMHzBR4: %s\n", longhaul.bits.MaxMHzBR4 ? "1" : "0"); - printf ("\tMaxMHzBR: "); + printf("\tMaxMHzBR4: %s\n", longhaul.bits.MaxMHzBR4 ? "1" : "0"); + printf("\tMaxMHzBR: "); binary (4, longhaul.bits.MaxMHzBR); - printf ("\tMaximumVID: "); + printf("\tMaximumVID: "); binary (5, longhaul.bits.MaximumVID); - printf ("\tMaxMHzFSB: "); + printf("\tMaxMHzFSB: "); binary (2, longhaul.bits.MaxMHzFSB); - printf ("\tMinMHzBR4: %s\n", longhaul.bits.MinMHzBR4 ? "1" : "0"); - printf ("\tMinMHzBR: "); + printf("\tMinMHzBR4: %s\n", longhaul.bits.MinMHzBR4 ? "1" : "0"); + printf("\tMinMHzBR: "); binary (4, longhaul.bits.MinMHzBR); - printf ("\tMinimumVID: "); + printf("\tMinimumVID: "); binary (4, longhaul.bits.MinimumVID); - printf ("\tMinMHzFSB: "); + printf("\tMinMHzFSB: "); binary (2, longhaul.bits.MinMHzFSB); } } diff --git a/IDT/longhaul.c b/IDT/longhaul.c index c569f01..9611f51 100644 --- a/IDT/longhaul.c +++ b/IDT/longhaul.c @@ -45,40 +45,40 @@ void decode_longhaul(struct cpudata *cpu) dumpmsr (cpu->number, 0x110A, 64); if (longhaul.bits.RevisionID & 1) - printf ("\tSoftVID support\n"); + printf("\tSoftVID support\n"); if (longhaul.bits.RevisionID & 2) - printf ("\tSoftBSEL support\n"); + printf("\tSoftBSEL support\n"); if (longhaul.bits.RevisionID == 0) - printf ("\tSoftware clock multiplier only: No Softvid\n"); + printf("\tSoftware clock multiplier only: No Softvid\n"); if (longhaul.bits.EnableSoftBusRatio==1) - printf ("\tEnableSoftBusRatio=Enabled\n"); + printf("\tEnableSoftBusRatio=Enabled\n"); if (longhaul.bits.EnableSoftVID==1) - printf ("\tEnableSoftVID=Enabled\n"); + printf("\tEnableSoftVID=Enabled\n"); if (longhaul.bits.EnableSoftBSEL==1) - printf ("\tEnableSoftBSEL=Enabled\n"); + printf("\tEnableSoftBSEL=Enabled\n"); - printf ("\tSoftBusRatio4=%s\n", longhaul.bits.SoftBusRatio4 ? "1" : "0"); - printf ("\tSoftBusRatio="); + printf("\tSoftBusRatio4=%s\n", longhaul.bits.SoftBusRatio4 ? "1" : "0"); + printf("\tSoftBusRatio="); binary (4, longhaul.bits.SoftBusRatio); if (longhaul.bits.RevisionID & 1) - printf ("\tVRM Rev=%s\n", + printf("\tVRM Rev=%s\n", longhaul.bits.VRMRev ? "Mobile VRM" : "VRM 8.5"); - printf ("\tMaxMHzBR4: %s\n", longhaul.bits.MaxMHzBR4 ? "1" : "0"); - printf ("\tMaxMHzBR: "); + printf("\tMaxMHzBR4: %s\n", longhaul.bits.MaxMHzBR4 ? "1" : "0"); + printf("\tMaxMHzBR: "); binary (4, longhaul.bits.MaxMHzBR); - printf ("\tMaximumVID: "); + printf("\tMaximumVID: "); binary (5, longhaul.bits.MaximumVID); - printf ("\tMaxMHzFSB: "); + printf("\tMaxMHzFSB: "); binary (2, longhaul.bits.MaxMHzFSB); - printf ("\tMinMHzBR4: %s\n", longhaul.bits.MinMHzBR4 ? "1" : "0"); - printf ("\tMinMHzBR: "); + printf("\tMinMHzBR4: %s\n", longhaul.bits.MinMHzBR4 ? "1" : "0"); + printf("\tMinMHzBR: "); binary (4, longhaul.bits.MinMHzBR); - printf ("\tMinimumVID: "); + printf("\tMinimumVID: "); binary (4, longhaul.bits.MinimumVID); - printf ("\tMinMHzFSB: "); + printf("\tMinMHzFSB: "); binary (2, longhaul.bits.MinMHzFSB); } } diff --git a/IDT/powersaver.c b/IDT/powersaver.c index 4973180..da3600c 100644 --- a/IDT/powersaver.c +++ b/IDT/powersaver.c @@ -24,61 +24,61 @@ void decode_powersaver(struct cpudata *cpu) printf("\n"); if (read_msr(cpu->number, MSR_POWERSAVER, &ps.val) != 1) { - printf ("Something went wrong reading MSR_POWERSAVER\n"); + printf("Something went wrong reading MSR_POWERSAVER\n"); return; } - printf (" RevisionID: %x : ", ps.bits.RevisionID); + printf(" RevisionID: %x : ", ps.bits.RevisionID); switch (ps.bits.RevisionID) { - case 0x0: printf ("Initial revision (Software clock multiplier only, no SoftVID)\n"); + case 0x0: printf("Initial revision (Software clock multiplier only, no SoftVID)\n"); break; - case 0x1: printf ("SoftVID support\n"); + case 0x1: printf("SoftVID support\n"); break; - default: printf ("Unknown (0x%x).\n", ps.bits.RevisionID); + default: printf("Unknown (0x%x).\n", ps.bits.RevisionID); break; } - printf (" Software clock multiplier is "); + printf(" Software clock multiplier is "); if (ps.bits.EnableSoftBusRatio == 0) - printf ("disabled\n"); + printf("disabled\n"); else { - printf ("enabled\n"); - printf ("\tMaxMHzBR4: %s\n", ps.bits.MaxMHzBR4 ? "1" : "0"); - printf ("\tMaxMHzBR: "); + printf("enabled\n"); + printf("\tMaxMHzBR4: %s\n", ps.bits.MaxMHzBR4 ? "1" : "0"); + printf("\tMaxMHzBR: "); binary (4, ps.bits.MaxMHzBR); - printf ("\tMinMHzBR4: %s\n", ps.bits.MinMHzBR4 ? "1" : "0"); - printf ("\tMinMHzBR: "); + printf("\tMinMHzBR4: %s\n", ps.bits.MinMHzBR4 ? "1" : "0"); + printf("\tMinMHzBR: "); binary (4, ps.bits.MinMHzBR); } /* these bits invalid if revision == 0*/ if (ps.bits.RevisionID != 0) { - printf (" Software VID is "); + printf(" Software VID is "); if (ps.bits.EnableSoftVID == 0) - printf ("disabled\n"); + printf("disabled\n"); else { - printf ("enabled\n"); - printf ("\tVRM Rev=%s\n", + printf("enabled\n"); + printf("\tVRM Rev=%s\n", ps.bits.VRMRev ? "Mobile VRM" : "VRM 8.5"); - printf ("\tMinimumVID: "); + printf("\tMinimumVID: "); binary (4, ps.bits.MinimumVID); - printf ("\tMaximumVID: "); + printf("\tMaximumVID: "); binary (5, ps.bits.MaximumVID); } if (ps.bits.EnableSoftBusRatio==1) { - printf ("\tEnableSoftBusRatio=Enabled\n"); - printf ("\tMaxMHzFSB: "); + printf("\tEnableSoftBusRatio=Enabled\n"); + printf("\tMaxMHzFSB: "); binary (2, ps.bits.MaxMHzFSB); - printf ("\tMinMHzFSB: "); + printf("\tMinMHzFSB: "); binary (2, ps.bits.MinMHzFSB); } //if (ps.bits.EnableSoftBSEL==1) - // printf ("\tEnableSoftBSEL=Enabled\n"); + // printf("\tEnableSoftBSEL=Enabled\n"); - printf ("\tSoftBusRatio4=%s\n", ps.bits.SoftBusRatio4 ? "1" : "0"); - printf ("\tSoftBusRatio="); + printf("\tSoftBusRatio4=%s\n", ps.bits.SoftBusRatio4 ? "1" : "0"); + printf("\tSoftBusRatio="); binary (4, ps.bits.SoftBusRatio); } } diff --git a/Intel/MSR-P4.c b/Intel/MSR-P4.c index c7cca5e..2a8010d 100644 --- a/Intel/MSR-P4.c +++ b/Intel/MSR-P4.c @@ -14,103 +14,103 @@ void dump_p4_MSRs (struct cpudata *cpu) { - unsigned long long val=0; + unsigned long long val = 0; if (!user_is_root) return; - printf ("Pentium 4 specific MSRs:\n"); + printf("Pentium 4 specific MSRs:\n"); - if (read_msr (cpu->number, 0x17, &val)==1) - printf ("IA32_PLATFORM_ID=%016llx\n", val); + if (read_msr (cpu->number, 0x17, &val) == 1) + printf("IA32_PLATFORM_ID=%016llx\n", val); - if (read_msr (cpu->number, 0x2a, &val)==1) { - printf ("System bus in order queue depth="); + if (read_msr (cpu->number, 0x2a, &val) == 1) { + printf("System bus in order queue depth="); if ((val & (1<<2))) - printf ("1"); + printf("1"); else - printf ("12"); - printf ("\n"); + printf("12"); + printf("\n"); } - if (read_msr (cpu->number, 0x2c, &val)==1) { - printf ("MSR_EBC_FREQUENCY_ID=%016llx\n", val); + if (read_msr (cpu->number, 0x2c, &val) == 1) { + printf("MSR_EBC_FREQUENCY_ID=%016llx\n", val); } - if (read_msr (cpu->number, 0x8b, &val)==1) { - printf ("IA32_BIOS_SIGN_ID=%016llx\n", val); + if (read_msr (cpu->number, 0x8b, &val) == 1) { + printf("IA32_BIOS_SIGN_ID=%016llx\n", val); } - if (read_msr (cpu->number, 0x119, &val)==1) { - printf ("Processor serial number is "); + if (read_msr (cpu->number, 0x119, &val) == 1) { + printf("Processor serial number is "); if ((val & (1<<21))) - printf ("dis"); + printf("dis"); else - printf ("en"); - printf ("abled\n"); + printf("en"); + printf("abled\n"); } - if (read_msr (cpu->number, 0x1a0, &val)==1) { - printf ("Fast string enable is "); + if (read_msr (cpu->number, 0x1a0, &val) == 1) { + printf("Fast string enable is "); if (!(val & (1<<0))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("x87 FPU Fopcode compatability mode is "); + printf("x87 FPU Fopcode compatability mode is "); if (!(val & (1<<2))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("Thermal monitor enable is "); + printf("Thermal monitor enable is "); if (!(val & (1<<3))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("Split lock disable is "); + printf("Split lock disable is "); if (!(val & (1<<4))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("L3 cache disable is "); + printf("L3 cache disable is "); if (!(val & (1<<6))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("Performance monitoring is "); + printf("Performance monitoring is "); if (!(val & (1<<7))) - printf ("un"); - printf ("available\n"); + printf("un"); + printf("available\n"); - printf ("Suppress lock enable is "); + printf("Suppress lock enable is "); if (!(val & (1<<8))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("Prefetch queue disable is "); + printf("Prefetch queue disable is "); if (!(val & (1<<9))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("FERR# Interrupt reporting enable is "); + printf("FERR# Interrupt reporting enable is "); if (!(val & (1<<10))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("Branch trace storage unavailable is "); + printf("Branch trace storage unavailable is "); if (!(val & (1<<11))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); - printf ("Precise Event Based Sampling Unavailable is "); + printf("Precise Event Based Sampling Unavailable is "); if (!(val & (1<<12))) - printf ("un"); - printf ("set\n"); + printf("un"); + printf("set\n"); } /* - if (read_msr (cpu->number, 0x410, &val)==1) { + if (read_msr (cpu->number, 0x410, &val) == 1) { } */ - printf ("\n"); + printf("\n"); } diff --git a/Intel/MSR-P6.c b/Intel/MSR-P6.c index befb3c8..fb989bd 100644 --- a/Intel/MSR-P6.c +++ b/Intel/MSR-P6.c @@ -14,26 +14,26 @@ void dump_p6_MSRs (struct cpudata *cpu) { - unsigned long long val=0; + unsigned long long val = 0; if (!user_is_root) return; - printf ("P6 family MSRs:\n"); + printf("P6 family MSRs:\n"); - if (read_msr (cpu->number, 0x2a, &val)==1) { - printf ("Low power mode is "); - if ((val & (1<<26))==0) - printf ("dis"); + if (read_msr (cpu->number, 0x2a, &val) == 1) { + printf("Low power mode is "); + if ((val & (1<<26)) == 0) + printf("dis"); else - printf ("en"); - printf ("abled\n"); + printf("en"); + printf("abled\n"); } /* - if (read_msr (cpu->number, 0x410, &val)==1) { + if (read_msr (cpu->number, 0x410, &val) == 1) { } */ - printf ("\n"); + printf("\n"); } diff --git a/Intel/MSR-PM.c b/Intel/MSR-PM.c index 0ccb876..dea76ab 100644 --- a/Intel/MSR-PM.c +++ b/Intel/MSR-PM.c @@ -15,15 +15,15 @@ void dump_centrino_MSRs (struct cpudata *cpu) { - unsigned long long val=0; + unsigned long long val = 0; int tcc = 0; if (!user_is_root) return; - printf ("Pentium M MSRs:\n"); + printf("Pentium M MSRs:\n"); - if (read_msr (cpu->number, MSR_IA32_PERF_STATUS, &val)==1) { + if (read_msr (cpu->number, MSR_IA32_PERF_STATUS, &val) == 1) { /* Voltage and frequency values derived from 1300MHz Pentium M in an IBM ThinkPad X31. Constants for @@ -39,11 +39,11 @@ void dump_centrino_MSRs (struct cpudata *cpu) unsigned uv = (unsigned)val & 0xffff; int volt = (uv & 0xff) * 16 + 700; int mhz = 100 * (uv & 0xff00) >> 8UL; - printf (" Current performance mode is 0x%04x: %dMHz, %d.%dV\n", + printf(" Current performance mode is 0x%04x: %dMHz, %d.%dV\n", uv, mhz, volt/1000, volt%1000); } - if (read_msr (cpu->number, MSR_IA32_MISC_ENABLE, &val)==1) { - printf (" Enabled: "); + if (read_msr (cpu->number, MSR_IA32_MISC_ENABLE, &val) == 1) { + printf(" Enabled: "); if (val & (1<<3)) { printf("TCC "); tcc = 1; @@ -61,17 +61,17 @@ void dump_centrino_MSRs (struct cpudata *cpu) printf("\n"); } - if (tcc && read_msr (cpu->number, MSR_PM_THERM2_CTL, &val)==1) { /* THERM2_CTL */ + if (tcc && read_msr (cpu->number, MSR_PM_THERM2_CTL, &val) == 1) { /* THERM2_CTL */ printf(" Thermal monitor %d\n", (val & (1<<16)) ? 2 : 1); } - if (read_msr (cpu->number, MSR_IA32_THERM_CONTROL, &val)==1) { + if (read_msr (cpu->number, MSR_IA32_THERM_CONTROL, &val) == 1) { if (val & (1<<4)) { printf(" Software-controlled clock: %f%% duty cycle\n", ((val >> 1) & 7) / 8.); } else printf(" Software-controlled clock disabled (full speed)\n"); } - if (read_msr (cpu->number, MSR_IA32_THERM_STATUS, &val)==1) { /* THERM_STATUS */ + if (read_msr (cpu->number, MSR_IA32_THERM_STATUS, &val) == 1) { /* THERM_STATUS */ printf(" Thermal status: "); if (val & (1<<0)) printf("TooHot "); @@ -79,5 +79,5 @@ void dump_centrino_MSRs (struct cpudata *cpu) printf("WasTooHot "); printf("\n"); } - printf ("\n"); + printf("\n"); } diff --git a/Intel/bluesmoke.c b/Intel/bluesmoke.c index 7b600cf..6edd3cd 100644 --- a/Intel/bluesmoke.c +++ b/Intel/bluesmoke.c @@ -22,8 +22,6 @@ #define MC_STATUS 0x0401 #define MC_ADDR 0x402 -#define PENTIUM4(family) (family == 0xf) - void decode_Intel_bluesmoke(int cpunum, int family) { unsigned long long val, val2; @@ -37,83 +35,83 @@ void decode_Intel_bluesmoke(int cpunum, int family) banks = val & 0xff; - printf ("\nNumber of reporting banks : %d\n\n", banks); + printf("\nNumber of reporting banks : %d\n\n", banks); - if (PENTIUM4(family)) { + if (family == 0xf) { if ((val & (1<<MCG_EXT_PBIT))) { extcount = (val >> 16) & 0xff; - printf ("Number of extended MC registers : %d\n\n", extcount); + printf("Number of extended MC registers : %d\n\n", extcount); } else - printf ("Erk, MCG_EXT not present! :%016llx:\n", val); + printf("Erk, MCG_EXT not present! :%016llx:\n", val); } else if ((val & (1<<MCG_CTL_PBIT)) == 0) - printf ("Erk, MCG_CTL not present! :%016llx:\n", val); + printf("Erk, MCG_CTL not present! :%016llx:\n", val); if (read_msr(cpunum, MCG_CTL, &val) == 1) { - printf ("MCG_CTL:\n"); + printf("MCG_CTL:\n"); - printf (" Data cache check %sabled\n", val & (1<<0) ? "en" : "dis"); + printf(" Data cache check %sabled\n", val & (1<<0) ? "en" : "dis"); if ((val & (1<<0)) == 1) { if (read_msr(cpunum, MC_CTL, &val2) == 1) { - printf (" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); - printf (" Data cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); - printf (" Data cache main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); - printf (" Data cache snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); - printf (" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); - printf (" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); + printf(" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" Data cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); + printf(" Data cache main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); + printf(" Data cache snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); + printf(" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); + printf(" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); } } - printf (" Instruction cache check %sabled\n", val & (1<<1) ? "en" : "dis"); + printf(" Instruction cache check %sabled\n", val & (1<<1) ? "en" : "dis"); if (((val & (1<<1)) == 2) && (banks>1)) { if (read_msr(cpunum, MC_CTL+4, &val2) == 1) { - printf (" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); - printf (" Instruction cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); - printf (" IC main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); - printf (" IC snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); - printf (" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); - printf (" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); - printf (" Predecode array parity %sabled\n", val2 & (1<<7) ? "en" : "dis"); - printf (" Target selector parity %sabled\n", val2 & (1<<8) ? "en" : "dis"); - printf (" Read data error %sabled\n", val2 & (1<<9) ? "en" : "dis"); + printf(" ECC 1 bit error reporting %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" ECC multi bit error reporting %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" Instruction cache data parity %sabled\n", val2 & (1<<2) ? "en" : "dis"); + printf(" IC main tag parity %sabled\n", val2 & (1<<3) ? "en" : "dis"); + printf(" IC snoop tag parity %sabled\n", val2 & (1<<4) ? "en" : "dis"); + printf(" L1 TLB parity %sabled\n", val2 & (1<<5) ? "en" : "dis"); + printf(" L2 TLB parity %sabled\n", val2 & (1<<6) ? "en" : "dis"); + printf(" Predecode array parity %sabled\n", val2 & (1<<7) ? "en" : "dis"); + printf(" Target selector parity %sabled\n", val2 & (1<<8) ? "en" : "dis"); + printf(" Read data error %sabled\n", val2 & (1<<9) ? "en" : "dis"); } } - printf (" Bus unit check %sabled\n", val & (1<<2) ? "en" : "dis"); + printf(" Bus unit check %sabled\n", val & (1<<2) ? "en" : "dis"); if ((val & (1<<2)) == 4 && (banks>2)) { if (read_msr(cpunum, MC_CTL+8, &val2) == 1) { - printf (" External L2 tag parity error %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" L2 partial tag parity error %sabled\n", val2 & (1<<1) ? "en" : "dis"); - printf (" System ECC TLB reload error %sabled\n", val2 & (1<<2) ? "en" : "dis"); - printf (" L2 ECC TLB reload error %sabled\n", val2 & (1<<3) ? "en" : "dis"); - printf (" L2 ECC K7 deallocate %sabled\n", val2 & (1<<4) ? "en" : "dis"); - printf (" L2 ECC probe deallocate %sabled\n", val2 & (1<<5) ? "en" : "dis"); - printf (" System datareaderror reporting %sabled\n", val2 & (1<<6) ? "en" : "dis"); + printf(" External L2 tag parity error %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" L2 partial tag parity error %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" System ECC TLB reload error %sabled\n", val2 & (1<<2) ? "en" : "dis"); + printf(" L2 ECC TLB reload error %sabled\n", val2 & (1<<3) ? "en" : "dis"); + printf(" L2 ECC K7 deallocate %sabled\n", val2 & (1<<4) ? "en" : "dis"); + printf(" L2 ECC probe deallocate %sabled\n", val2 & (1<<5) ? "en" : "dis"); + printf(" System datareaderror reporting %sabled\n", val2 & (1<<6) ? "en" : "dis"); } } - printf (" Load/Store unit check %sabled\n", val & (1<<3) ? "en" : "dis"); + printf(" Load/Store unit check %sabled\n", val & (1<<3) ? "en" : "dis"); if ((val & (1<<3)) == 8 && (banks>3)) { if (read_msr(cpunum, MC_CTL+12, &val2) == 1) { - printf (" Read data error enable (loads) %sabled\n", val2 & (1<<0) ? "en" : "dis"); - printf (" Read data error enable (stores) %sabled\n", val2 & (1<<1) ? "en" : "dis"); + printf(" Read data error enable (loads) %sabled\n", val2 & (1<<0) ? "en" : "dis"); + printf(" Read data error enable (stores) %sabled\n", val2 & (1<<1) ? "en" : "dis"); } } } - printf ("\n"); + printf("\n"); for (i=0; i<banks; i++) { - printf ("Bank: %d (0x%x)\n", i, (unsigned int)MC_CTL+i*4); - printf ("MC%dCTL: ", i); + printf("Bank: %d (0x%x)\n", i, (unsigned int)MC_CTL+i*4); + printf("MC%dCTL: ", i); dumpmsr_bin (cpunum, MC_CTL+i*4, 64); - printf ("MC%dSTATUS: ", i); + printf("MC%dSTATUS: ", i); dumpmsr_bin (cpunum, MC_STATUS+i*4, 64); - printf ("MC%dADDR: ", i); + printf("MC%dADDR: ", i); dumpmsr_bin (cpunum, MC_ADDR+i*4, 64); - printf ("\n"); + printf("\n"); } } diff --git a/Intel/cachesize.c b/Intel/cachesize.c index c4d73f3..dfa9cc6 100644 --- a/Intel/cachesize.c +++ b/Intel/cachesize.c @@ -156,8 +156,8 @@ static unsigned char unknown_array[256]; static void decode_Intel_cache(int des, struct cpudata *cpu, int output, struct _cache_table *table) { - int k=0; - int found=0; + int k = 0; + int found = 0; /* "No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache". Skip this pointless entry.*/ @@ -166,7 +166,7 @@ static void decode_Intel_cache(int des, struct cpudata *cpu, int output, //TODO: Add description to link-list in cpu-> - while ((table[k].descriptor != 0) && (found==0)) { + while ((table[k].descriptor != 0) && (found == 0)) { if (table[k].descriptor == des) { if (table == TRACE_cache_table) @@ -189,14 +189,14 @@ static void decode_Intel_cache(int des, struct cpudata *cpu, int output, cpu->cachesize_L3 += table[k].size; if (output) - printf (" %s\n", table[k].string); + printf(" %s\n", table[k].string); found = 1; } k++; } - if ((found==0) && (unknown_array[des]==0)) { - unknown_array[des]=1; + if ((found == 0) && (unknown_array[des] == 0)) { + unknown_array[des] = 1; found_unknown++; } } @@ -236,8 +236,8 @@ void clean_unknowns(struct _cache_table *table) while (table[j].descriptor != 0) { des = table[j++].descriptor; - if (unknown_array[des]==1) { - unknown_array[des]=0; + if (unknown_array[des] == 1) { + unknown_array[des] = 0; found_unknown--; } } @@ -263,11 +263,10 @@ void decode_Intel_caches(struct cpudata *cpu, int output) oldknown = found_unknown; decode_cache(cpu, L2_cache_table, output); if (found_unknown > 0) { - if (oldknown == found_unknown) { + if (oldknown == found_unknown) decode_cache(cpu, L2L3_cache_table, output); - } else { + else decode_cache(cpu, L3L2_cache_table, output); - } } decode_cache(cpu, L3_cache_table, output); @@ -295,15 +294,15 @@ void decode_Intel_caches(struct cpudata *cpu, int output) return; if (output) - printf ("Found unknown cache descriptors: "); + printf("Found unknown cache descriptors: "); for (i=0; i<256; i++) { - if (unknown_array[i]==1) + if (unknown_array[i] == 1) if (output) - printf ("%02x ", i); + printf("%02x ", i); } if (output) - printf ("\n"); + printf("\n"); found_unknown = 0; } diff --git a/Intel/eblcr.c b/Intel/eblcr.c index b9693e0..8650603 100644 --- a/Intel/eblcr.c +++ b/Intel/eblcr.c @@ -37,9 +37,9 @@ void interpret_eblcr(u32 lo) * 766MHz Celeron. 66MHz x 11.5 Being picked up as 133x5.0 * bus:1 mul:0 */ - -/* printf ("bus:%x mul:%x\n", bus, mul);*/ - + +/* printf("bus:%x mul:%x\n", bus, mul);*/ + /* The mobile pIII added bit 27. * This is zero on other intel and on the cyrix III */ @@ -48,11 +48,11 @@ void interpret_eblcr(u32 lo) busclock = buscode[1][bus]/100; - if (busclock==0 || mult[mul]==0) + if (busclock == 0 || mult[mul] == 0) printf("Unknown CPU/BUS multiplier (%d X %dMHz, %x).\n", mul, bus, lo); cpuclk = (buscode[1][bus] * mult[mul])/200; - printf ("Bus Speed (%dMHz) x Multiplier (%.1fx) = CPU speed %dMhz\n", + printf("Bus Speed (%dMHz) x Multiplier (%.1fx) = CPU speed %dMhz\n", busclock, (float) cpuclk/busclock, cpuclk); diff --git a/Intel/identify.c b/Intel/identify.c index 53bbd25..630f4ac 100644 --- a/Intel/identify.c +++ b/Intel/identify.c @@ -50,9 +50,9 @@ void Identify_Intel (struct cpudata *cpu) switch (cpu->family) { case 4: add_to_cpuname("i486 "); - break; + break; case 5: add_to_cpuname("Pentium "); - break; + break; } switch (tuple(cpu) & 0xff0) { @@ -424,11 +424,10 @@ void Identify_Intel (struct cpudata *cpu) default: cpu->connector = CONN_SOCKET_370_FCPGA; - if (cpu->cachesize_L2 == 128) { + if (cpu->cachesize_L2 == 128) add_to_cpuname("Celeron"); - } else { + else add_to_cpuname("Pentium III"); - } add_to_cpuname(" (Coppermine)"); switch (cpu->stepping) { @@ -667,11 +666,10 @@ void Identify_Intel (struct cpudata *cpu) if(cpu->MHz/100 >= 29) { add_to_cpuname("Extreme "); } else { - if (cpu->stepping == 7) { + if (cpu->stepping == 7) add_to_cpuname("Quad (Kentsfield)"); - } else { + else add_to_cpuname("Duo "); - } } // Check for Thermal Monitor 2 feature bit, because only the // non-mobile processors have it diff --git a/Intel/info.c b/Intel/info.c index 65cc230..d623b24 100644 --- a/Intel/info.c +++ b/Intel/info.c @@ -36,16 +36,16 @@ void decode_serial_number(struct cpudata *cpu) p += sprintf(p, "-%04lX", ecx >> 16); p += sprintf(p, "-%04lX\n", ecx & 0xffff); - printf ("Processor serial: %s\n", cpu->serialno); + printf("Processor serial: %s\n", cpu->serialno); } void display_Intel_info (struct cpudata *cpu) { unsigned long ebx; - printf ("Family: %u Model: %u Stepping: %u Type: %u Brand: %u\n", + printf("Family: %u Model: %u Stepping: %u Type: %u Brand: %u\n", cpu->family, cpu->model, cpu->stepping, cpu->type, cpu->brand); - printf ("CPU Model: %s\n", cpu->name); + printf("CPU Model: %s\n", cpu->name); /* Pentium4 and Banias have cpu name. */ if (cpu->family == 0xF || (cpu->family == 6 && cpu->model == 9)) @@ -54,9 +54,9 @@ void display_Intel_info (struct cpudata *cpu) decode_feature_flags (cpu); if (show_msr) { - if (cpu->family==0xf) + if (cpu->family == 0xf) dump_p4_MSRs(cpu); - if (cpu->family==0x6 && (cpu->model == 9 || cpu->model == 13)) + if (cpu->family == 0x6 && (cpu->model == 9 || cpu->model == 13)) dump_centrino_MSRs(cpu); } @@ -85,7 +85,7 @@ void display_Intel_info (struct cpudata *cpu) if (!nr_ht) nr_ht = 1; - printf ("The physical package supports " + printf("The physical package supports " "%d logical processors \n\n", nr_ht); } diff --git a/Intel/microcode.c b/Intel/microcode.c index 37f8d41..a557329 100644 --- a/Intel/microcode.c +++ b/Intel/microcode.c @@ -14,7 +14,7 @@ void decode_microcode(struct cpudata *cpu) { - unsigned long long val=0; + unsigned long long val = 0; int ver; if (!user_is_root) @@ -23,10 +23,10 @@ void decode_microcode(struct cpudata *cpu) if (cpu->family < 6) return; - if (read_msr (cpu->number, MSR_IA32_UCODE_REV, &val)==1) { + if (read_msr (cpu->number, MSR_IA32_UCODE_REV, &val) == 1) { ver = val >>32; if (ver>0) - printf ("Microcode version: 0x%016llx\n", val >>32); - printf ("\n"); + printf("Microcode version: 0x%016llx\n", val >>32); + printf("\n"); } } diff --git a/NatSemi/identify.c b/NatSemi/identify.c index 91e181f..07ec204 100644 --- a/NatSemi/identify.c +++ b/NatSemi/identify.c @@ -38,9 +38,9 @@ void Identify_NatSemi (struct cpudata *cpu) void display_NatSemi_info(struct cpudata *cpu) { - printf ("Family: %u Model: %u Stepping: %u\n", + printf("Family: %u Model: %u Stepping: %u\n", cpu->family, cpu->model, cpu->stepping); - printf ("CPU Model : %s\n", cpu->name); + printf("CPU Model : %s\n", cpu->name); get_model_name (cpu); decode_feature_flags (cpu); diff --git a/RiSE/identify.c b/RiSE/identify.c index d32f388..4b1255f 100644 --- a/RiSE/identify.c +++ b/RiSE/identify.c @@ -44,9 +44,9 @@ void Identify_RiSE (struct cpudata *cpu) void display_RiSE_info(struct cpudata *cpu) { - printf ("Family: %u Model: %u Stepping: %u\n", + printf("Family: %u Model: %u Stepping: %u\n", cpu->family, cpu->model, cpu->stepping); - printf ("CPU Model : %s\n", cpu->name); + printf("CPU Model : %s\n", cpu->name); get_model_name (cpu); decode_feature_flags (cpu); diff --git a/SiS/identify.c b/SiS/identify.c index 2afd1a8..05d7af8 100644 --- a/SiS/identify.c +++ b/SiS/identify.c @@ -38,9 +38,9 @@ void Identify_SiS (struct cpudata *cpu) void display_SiS_info(struct cpudata *cpu) { - printf ("Family: %u Model: %u Stepping: %u\n", + printf("Family: %u Model: %u Stepping: %u\n", cpu->family, cpu->model, cpu->stepping); - printf ("CPU Model : %s\n", cpu->name); + printf("CPU Model : %s\n", cpu->name); get_model_name (cpu); decode_feature_flags (cpu); diff --git a/bench/MHz.c b/bench/MHz.c index bdb12f8..0e2cb9b 100644 --- a/bench/MHz.c +++ b/bench/MHz.c @@ -32,9 +32,9 @@ void estimate_MHz(struct cpudata *cpu) unsigned long freq = 1; /* Make sure we have a TSC (and hence RDTSC) */ - cpuid (cpu->number, 1, &eax, &ebx, &ecx, &edx); + cpuid(cpu->number, 1, &eax, &ebx, &ecx, &edx); if ((edx & (1<<4))==0) { - printf ("No TSC, MHz calculation cannot be performed.\n"); + printf("No TSC, MHz calculation cannot be performed.\n"); cpu->MHz = 0; return; } @@ -8,23 +8,23 @@ #include <stdio.h> -void binary (unsigned int n, unsigned long value) +void binary(unsigned int n, unsigned long value) { unsigned int i; - for(i=0; i<n; i++, value<<=1) + for (i=0; i<n; i++, value<<=1) (void)putchar( (1<<(n-1) & value) ? '1' : '0' ); (void)putchar('\n'); } -void binary32 (unsigned long value) +void binary32(unsigned long value) { int i; - for(i=0;i<32;i++,value<<=1) { + for (i=0;i<32;i++,value<<=1) { (void)putchar( (1<<31 & value) ? '1' : '0' ); - if(i==23 || i==15 || i==7) + if (i==23 || i==15 || i==7) (void)putchar(' '); } (void)putchar('\n'); @@ -32,7 +32,7 @@ void binary32 (unsigned long value) void binary64(unsigned long long value) { - binary32 (value>>32); - printf (" "); - binary32 (value); + binary32(value>>32); + printf(" "); + binary32(value); } @@ -27,7 +27,7 @@ #include "x86info.h" #if defined(__FreeBSD__) -void cpuid (int CPU_number, unsigned int idx, +void cpuid(int CPU_number, unsigned int idx, unsigned long *eax, unsigned long *ebx, unsigned long *ecx, @@ -67,7 +67,7 @@ void cpuid (int CPU_number, unsigned int idx, if (!silent && nrCPUs != 1) perror(cpuname); used_UP = 1; - cpuid_UP (idx, eax, ebx, ecx, edx); + cpuid_UP(idx, eax, ebx, ecx, edx); return; } } @@ -126,7 +126,7 @@ void cpuid (int CPU_number, unsigned int idx, if (!silent && nrCPUs != 1) perror(cpuname); used_UP = 1; - cpuid_UP (idx, eax, ebx, ecx, edx); + cpuid_UP(idx, eax, ebx, ecx, edx); return; } } @@ -146,15 +146,15 @@ void decode_feature_flags(struct cpudata *cpu) if (silent != 0) return; - printf ("Feature flags:\n"); + printf("Feature flags:\n"); for (i=0; i<32; i++) { if (cpu->flags_edx & (1 << i)) { if (!(generic_cap_flags_desc[i])) printf(" [%u]", i); if (verbose) - printf ("\t%s\n", generic_cap_flags_desc[i]); + printf("\t%s\n", generic_cap_flags_desc[i]); else - printf (" %s", generic_cap_flags[i]); + printf(" %s", generic_cap_flags[i]); } } @@ -163,20 +163,20 @@ void decode_feature_flags(struct cpudata *cpu) case VENDOR_AMD: for (i=0; i<32; i++) { if (cpu->flags_ecx & (1 << i) && amd_cap_generic_ecx_flags[i]) - printf (" %s", amd_cap_generic_ecx_flags[i]); + printf(" %s", amd_cap_generic_ecx_flags[i]); } printf("\n"); if (cpu->maxei < 0x80000001) break; - printf ("Extended feature flags:\n"); + printf("Extended feature flags:\n"); flag_decode(cpu->eflags_edx, amd_cap_extended_edx_flags); flag_decode(cpu->eflags_ecx, amd_cap_extended_ecx_flags); printf("\n"); break; case VENDOR_CENTAUR: - printf ("\n"); - printf ("Extended feature flags:\n"); + printf("\n"); + printf("Extended feature flags:\n"); flag_decode(cpu->flags_ecx, centaur_cap_extended_ecx_flags); cpuid(cpu->number, 0xc0000000, &eax, &ebx, &ecx, &edx); if (eax >=0xc0000001) { @@ -187,22 +187,22 @@ void decode_feature_flags(struct cpudata *cpu) break; case VENDOR_TRANSMETA: - printf ("\n"); - printf ("Extended feature flags:\n"); + printf("\n"); + printf("Extended feature flags:\n"); flag_decode(cpu->flags_ecx, transmeta_cap_flags); break; case VENDOR_CYRIX: - printf ("\n"); + printf("\n"); break; case VENDOR_INTEL: - printf ("\n"); - printf ("Extended feature flags:\n"); + printf("\n"); + printf("Extended feature flags:\n"); flag_decode(cpu->flags_ecx, intel_cap_generic_ecx_flags); if (cpu->maxei < 0x80000001) break; - printf ("\n"); + printf("\n"); flag_decode(cpu->eflags_edx, intel_cap_extended_edx_flags); flag_decode(cpu->eflags_ecx, intel_cap_extended_ecx_flags); break; @@ -212,5 +212,5 @@ void decode_feature_flags(struct cpudata *cpu) break; } - printf ("\n"); + printf("\n"); } diff --git a/havecpuid.c b/havecpuid.c index 2809f9d..094c82c 100644 --- a/havecpuid.c +++ b/havecpuid.c @@ -6,7 +6,7 @@ #include <stdio.h> -static __inline__ int flag_is_changeable_p(unsigned long flag) +static int flag_is_changeable_p(unsigned long flag) { unsigned long f1, f2; __asm__ volatile("pushf\n\t" @@ -57,10 +57,10 @@ static void dumpregs (int cpunum, unsigned int begin, unsigned int end) /* Dump all the CPUID results in raw hex */ for (i=begin; i<=end; i++) { - cpuid (cpunum, i, &eax, &ebx, &ecx, &edx); - printf ("eax in: 0x%08x, eax = %08lx ebx = %08lx ecx = %08lx edx = %08lx\n", i, eax, ebx, ecx, edx); + cpuid(cpunum, i, &eax, &ebx, &ecx, &edx); + printf("eax in: 0x%08x, eax = %08lx ebx = %08lx ecx = %08lx edx = %08lx\n", i, eax, ebx, ecx, edx); } - printf ("\n"); + printf("\n"); } void show_info(struct cpudata *cpu) @@ -69,7 +69,7 @@ void show_info(struct cpudata *cpu) return; if (show_registers) { - dumpregs (cpu->number, 0, cpu->maxi); + dumpregs(cpu->number, 0, cpu->maxi); if (cpu->maxei >=0x80000000) dumpregs (cpu->number, 0x80000000, cpu->maxei); @@ -111,16 +111,16 @@ void show_info(struct cpudata *cpu) } if (show_connector) - decode_connector (cpu->connector); + decode_connector(cpu->connector); if (show_urls) { if (cpu->datasheet_url != NULL) - printf ("Datasheet: %s\n", cpu->datasheet_url); + printf("Datasheet: %s\n", cpu->datasheet_url); if (cpu->errata_url != NULL) - printf ("Errata: %s\n", cpu->errata_url); + printf("Errata: %s\n", cpu->errata_url); - printf ("\n"); + printf("\n"); } if (!user_is_root) @@ -47,20 +47,20 @@ typedef unsigned long vm_offset_t; #define DEFAULT_TOPOFMEM 0xa0000 -#define BIOS_BASE 0xf0000 -#define BIOS_BASE2 0xe0000 -#define BIOS_SIZE 0x10000 -#define ONE_KBYTE 1024 +#define BIOS_BASE 0xf0000 +#define BIOS_BASE2 0xe0000 +#define BIOS_SIZE 0x10000 +#define ONE_KBYTE 1024 -#define GROPE_AREA1 0x80000 -#define GROPE_AREA2 0x90000 -#define GROPE_SIZE 0x10000 +#define GROPE_AREA1 0x80000 +#define GROPE_AREA2 0x90000 +#define GROPE_SIZE 0x10000 -#define PROCENTRY_FLAG_EN 0x01 -#define PROCENTRY_FLAG_BP 0x02 -#define IOAPICENTRY_FLAG_EN 0x01 +#define PROCENTRY_FLAG_EN 0x01 +#define PROCENTRY_FLAG_BP 0x02 +#define IOAPICENTRY_FLAG_EN 0x01 -#define MAXPNSTR 132 +#define MAXPNSTR 132 /* global data */ static int pfd; /* physical /dev/mem fd */ @@ -92,7 +92,7 @@ static tableEntry basetableEntryTypes[] = /* MP Floating Pointer Structure */ typedef struct MPFPS { char signature[4]; - u32 pap; + u32 pap; u8 length; u8 spec_rev; u8 checksum; @@ -111,7 +111,7 @@ typedef struct MPCTH { u8 checksum; u8 oem_id[8]; u8 product_id[12]; - u32 oem_table_pointer; + u32 oem_table_pointer; u16 oem_table_size; u16 entry_count; u32 apic_address; @@ -200,7 +200,7 @@ static void processorEntry(void) static int MPConfigTableHeader(u32 pap) { vm_offset_t paddr; - mpcth_t cth; + mpcth_t cth; int x; int totalSize, t; int count, c; @@ -238,7 +238,7 @@ static int MPConfigTableHeader(u32 pap) totalSize -= basetableEntryTypes[ 0 ].length; } if (verbose_mp) - printf ("\n"); + printf("\n"); return SMP_YES; } @@ -276,7 +276,7 @@ static int apic_probe(vm_offset_t* paddr) /* read CMOS for real top of mem */ seekEntry((vm_offset_t)TOPOFMEM_POINTER); readEntry(&segment, 2); - --segment; /* less ONE_KBYTE */ + --segment; /* less ONE_KBYTE */ target = segment * 1024; seekEntry(target); readEntry(buffer, ONE_KBYTE); @@ -409,9 +409,9 @@ int issmp(int verb) #ifdef STANDALONE int main() { - int numcpu, smp; + int numcpu, smp; numcpu = enumerate_cpus(); - smp=issmp(1); + smp = issmp(1); printf("SMP: %d\nCPU: %d\n", smp, numcpu); return 0; } @@ -10,57 +10,57 @@ #include <stdio.h> #include "x86info.h" -static void dump_mtrr (int cpu, int msr) +static void dump_mtrr(int cpu, int msr) { unsigned long long val=0; if (read_msr(cpu, msr, &val) == 1) - printf ("0x%016llx\n", val); + printf("0x%016llx\n", val); } -void dump_mtrrs (struct cpudata *cpu) +void dump_mtrrs(struct cpudata *cpu) { unsigned int i; if (!(cpu->flags_edx & (X86_FEATURE_MTRR))) return; - printf ("MTRR registers:\n"); + printf("MTRR registers:\n"); - printf ("MTRRcap (0xfe): "); - dump_mtrr (cpu->number, 0xfe); + printf("MTRRcap (0xfe): "); + dump_mtrr(cpu->number, 0xfe); for (i=0; i<16; i+=2) { - printf ("MTRRphysBase%u (0x%x): ", i/2, (unsigned int) 0x200+i); + printf("MTRRphysBase%u (0x%x): ", i/2, (unsigned int) 0x200+i); dump_mtrr(cpu->number, 0x200+i); - printf ("MTRRphysMask%u (0x%x): ", i/2, (unsigned int) 0x201+i); + printf("MTRRphysMask%u (0x%x): ", i/2, (unsigned int) 0x201+i); dump_mtrr(cpu->number, 0x201+i); } - printf ("MTRRfix64K_00000 (0x250): "); + printf("MTRRfix64K_00000 (0x250): "); dump_mtrr (cpu->number, 0x250); - printf ("MTRRfix16K_80000 (0x258): "); + printf("MTRRfix16K_80000 (0x258): "); dump_mtrr (cpu->number, 0x258); - printf ("MTRRfix16K_A0000 (0x259): "); + printf("MTRRfix16K_A0000 (0x259): "); dump_mtrr (cpu->number, 0x259); - printf ("MTRRfix4K_C8000 (0x269): "); + printf("MTRRfix4K_C8000 (0x269): "); dump_mtrr (cpu->number, 0x269); - printf ("MTRRfix4K_D0000 0x26a: "); + printf("MTRRfix4K_D0000 0x26a: "); dump_mtrr (cpu->number, 0x26a); - printf ("MTRRfix4K_D8000 0x26b: "); + printf("MTRRfix4K_D8000 0x26b: "); dump_mtrr (cpu->number, 0x26b); - printf ("MTRRfix4K_E0000 0x26c: "); + printf("MTRRfix4K_E0000 0x26c: "); dump_mtrr (cpu->number, 0x26c); - printf ("MTRRfix4K_E8000 0x26d: "); + printf("MTRRfix4K_E8000 0x26d: "); dump_mtrr (cpu->number, 0x26d); - printf ("MTRRfix4K_F0000 0x26e: "); + printf("MTRRfix4K_F0000 0x26e: "); dump_mtrr (cpu->number, 0x26e); - printf ("MTRRfix4K_F8000 0x26f: "); + printf("MTRRfix4K_F8000 0x26f: "); dump_mtrr (cpu->number, 0x26f); - printf ("MTRRdefType (0x2ff): "); + printf("MTRRdefType (0x2ff): "); dump_mtrr (cpu->number, 0x2ff); - printf ("\n\n"); + printf("\n\n"); } @@ -17,7 +17,7 @@ #include "x86info.h" #if defined(__FreeBSD__) -# include <sys/ioctl.h> +# include <sys/ioctl.h> # include <cpu.h> #endif @@ -45,17 +45,17 @@ int read_msr(int cpu, unsigned int idx, unsigned long long *val) return 0; } - args.msr = idx; - if (ioctl(fh, CPU_RDMSR, &args) != 0) { - if (close(fh) == -1) { - perror("close"); + args.msr = idx; + if (ioctl(fh, CPU_RDMSR, &args) != 0) { + if (close(fh) == -1) { + perror("close"); exit(EXIT_FAILURE); } return 0; } - *val = args.data; + *val = args.data; if (close(fh)==-1) { perror("close"); @@ -116,25 +116,25 @@ int read_msr(int cpu, unsigned int idx, unsigned long long *val) #endif /* __FreeBSD__ */ -void dumpmsr (int cpu, unsigned int msr, int size) +void dumpmsr(int cpu, unsigned int msr, int size) { unsigned long long val=0; if (read_msr(cpu, msr, &val) == 1) { if (size==32){ - printf ("MSR: 0x%08x=0x%08lx : ", msr, (unsigned long) val); + printf("MSR: 0x%08x=0x%08lx : ", msr, (unsigned long) val); binary32(val); } if (size==64) { - printf ("MSR: 0x%08x=0x%016llx : ", msr, val); + printf("MSR: 0x%08x=0x%016llx : ", msr, val); binary64(val); } return; } - printf ("Couldn't read MSR 0x%x\n", msr); + printf("Couldn't read MSR 0x%x\n", msr); } -void dumpmsr_bin (int cpu, unsigned int msr, int size) +void dumpmsr_bin(int cpu, unsigned int msr, int size) { unsigned long long val=0; @@ -145,5 +145,5 @@ void dumpmsr_bin (int cpu, unsigned int msr, int size) binary64(val); return; } - printf ("Couldn't read MSR 0x%x\n", msr); + printf("Couldn't read MSR 0x%x\n", msr); } @@ -40,7 +40,7 @@ static unsigned int nrSMPCPUs; static void usage (char *programname) { - printf ("Usage: %s [<switches>]\n\ + printf("Usage: %s [<switches>]\n\ -a, --all\n\ --bench\n\ --bios\n\ @@ -164,8 +164,8 @@ static void separator(void) int j; for (j=0; j<74; j++) - printf ("-"); - printf ("\n"); + printf("-"); + printf("\n"); } @@ -176,37 +176,37 @@ int main (int argc, char **argv) parse_command_line(argc, argv); if (!silent) { - printf ("x86info v1.21. Dave Jones 2001-2008\n"); - printf ("Feedback to <davej@redhat.com>.\n\n"); + printf("x86info v1.21. Dave Jones 2001-2008\n"); + printf("Feedback to <davej@redhat.com>.\n\n"); } - if ((HaveCPUID())==0) { - printf ("No CPUID instruction available.\n"); - printf ("No further information available for this CPU.\n"); + if ((HaveCPUID()) == 0) { + printf("No CPUID instruction available.\n"); + printf("No further information available for this CPU.\n"); return 0; } - if (getuid()!=0) + if (getuid() != 0) user_is_root=0; if (need_root && !user_is_root) - printf ("Need to be root to use specified options.\n"); + printf("Need to be root to use specified options.\n"); - nrCPUs = sysconf (_SC_NPROCESSORS_ONLN); + nrCPUs = sysconf(_SC_NPROCESSORS_ONLN); if (!silent) { - printf ("Found %u CPU", nrCPUs); + printf("Found %u CPU", nrCPUs); if (nrCPUs > 1) - printf ("s"); + printf("s"); /* Check mptable if present. This way we get number of CPUs on SMP systems that have booted UP kernels. */ if (user_is_root) { nrSMPCPUs = enumerate_cpus(); if (nrSMPCPUs > nrCPUs) - printf (", but found %ud CPUs in MPTable.", nrSMPCPUs); + printf(", but found %ud CPUs in MPTable.", nrSMPCPUs); } - printf ("\n"); + printf("\n"); } /* @@ -228,11 +228,11 @@ int main (int argc, char **argv) for (i=0; i<nrCPUs; i++) { cpu = malloc (sizeof (struct cpudata)); if (!cpu) { - printf ("Out of memory\n"); + printf("Out of memory\n"); return -1; } - memset (cpu, 0, sizeof(struct cpudata)); + memset(cpu, 0, sizeof(struct cpudata)); if (!head) { head = cpu; @@ -243,12 +243,12 @@ int main (int argc, char **argv) cpu->number = i; - if (!silent && nrCPUs!=1) - printf ("CPU #%u\n", i+1); + if (!silent && nrCPUs != 1) + printf("CPU #%u\n", i+1); estimate_MHz(cpu); - identify (cpu); - show_info (cpu); + identify(cpu); + show_info(cpu); /* * Doing this per-cpu is a problem, as we can't @@ -267,12 +267,12 @@ int main (int argc, char **argv) printf("%u.%u%uGHz", a, b, (cpu->MHz - c)/10); } - printf (" processor (estimate).\n\n"); + printf(" processor (estimate).\n\n"); } if (show_bench) show_benchmarks(); - if (nrCPUs>1) + if (nrCPUs > 1) separator(); if (cpu->next) @@ -291,9 +291,9 @@ int main (int argc, char **argv) cpu = tmp; } - if (nrCPUs > 1 && used_UP==1 && (!silent)) { - printf ("WARNING: Detected SMP, but unable to access cpuid driver.\n"); - printf ("Used Uniprocessor CPU routines. Results inaccurate.\n"); + if (nrCPUs > 1 && (used_UP == 1) && (!silent)) { + printf("WARNING: Detected SMP, but unable to access cpuid driver.\n"); + printf("Used Uniprocessor CPU routines. Results inaccurate.\n"); } return (0); |