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2018-01-29AMDGPU: Track physreg uses in SILoadStoreOptimizerwipNicolai Hähnle2-42/+52
2018-01-29AMDGPU: Do not combine loads/store across physreg defsNicolai Hähnle4-16/+102
2018-01-29StructurizeCFG: Test for branch divergence correctlyNicolai Hähnle4-6/+103
2018-01-29AMDGPU: Fix copying i1 value out of loop with non-uniform exitNicolai Hähnle5-1/+151
2018-01-26WIP SILowerReconvergingControlFlowNicolai Hähnle8-22/+331
2018-01-26WIP Add ReconvergeCFG passNicolai Hähnle9-3/+1271
2018-01-24Revert r321751, "StructurizeCFG: Fix broken backedge detection"nha6-172/+205
2018-01-24[ARM] Expand long shifts for Thumb1 to __aeabi_ callsweimingz2-0/+22
2018-01-24[X86] Fix some inconsistencies in the itineraries and Sched for (V)PEXTRW/(V)...ctopper4-8/+8
2018-01-24[X86] Adjust names of PINSRW/PEXTRW intructions between MMX/SSE/AVX/AVX512 fo...ctopper11-87/+79
2018-01-24[X86] Remove '(_REV)?' from a bunch of scheduler regular expressions. NFCctopper5-195/+193
2018-01-24[ThinLTO] Add call edges' relative block frequency to per-module summary.eraman7-21/+113
2018-01-24[SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle.abataev4-146/+370
2018-01-24[Hexagon] Run late copy propagation and dead code elimination passeskparzysz11-37/+48
2018-01-24Handle R_386_PLT32 in RuntimeDyldELF.rafael1-0/+3
2018-01-24InstSimplify: If divisor element is undef simplify to undefzvi3-2/+35
2018-01-24[globalisel] Introduce LegalityQuery to better encapsulate the legalizer deci...dsanders5-93/+138
2018-01-24[NFC] Make magic number for DJB hash function customizable.jdevlieghere2-3/+2
2018-01-24[dsymutil] Make NonRelocatableStringPool a wrapper around DwarfStringPoolEntr...Jonas Devlieghere3-57/+64
2018-01-24[ValueTracking] add recursion depth param to matchSelectPattern Sanjay Patel3-12/+66
2018-01-24X86 Tests: Add more sdiv combine cases. NFCZvi Rackover1-9/+3160
2018-01-24Regenerate shuffle sink testSimon Pilgrim1-28/+39
2018-01-24Reverted 323321.Amjad Aboud24-958/+6
2018-01-24[AArch64] Avoid unnecessary vector byte-swapping in big-endianPablo Barrio2-67/+76
2018-01-24[Hexagon] Remove unused HexagonISD opcodes, NFCKrzysztof Parzyszek4-28/+5
2018-01-24[DebugInfo] Emit DWARF reference for DIVariable 'count' in DISubrangeSander de Smalen3-1/+58
2018-01-24[InstCombine] Introducing Aggressive Instruction Combine pass (-aggressive-in...Amjad Aboud24-6/+958
2018-01-24[X86][SSE] Avoid calls to combineX86ShufflesRecursively that can't combine to...Simon Pilgrim1-9/+14
2018-01-24Fix typos of occurred and occurrenceMalcolm Parsons15-25/+25
2018-01-24Fixes Sphinx issue ('undefined label') introduced in r323313.Sander de Smalen1-3/+7
2018-01-24[llvm-opt-fuzzer] Add couple of popular passesIgor Laevsky1-0/+8
2018-01-24[Metadata] Extend 'count' field of DISubrange to take a metadata nodeSander de Smalen19-34/+370
2018-01-24[DAGCombiner] Bail out if vector size is not a multipleSven van Haastregt2-0/+16
2018-01-24[Doc] Guideline on adding exception handling support for a targetDavid Chisnall1-0/+63
2018-01-24[NFC] Remove overconfident assert from IRCEMax Kazantsev2-2/+42
2018-01-24[ARM] Call __chkstk for dynamic stack allocation in all windows environmentsMartin Storsjo3-6/+5
2018-01-24[GlobalMerge] Don't merge dllexport globalsMartin Storsjo3-1/+32
2018-01-24[X86] Move 'Y' to correct place in FMA4 regular expression in Znver1 schedule...Craig Topper1-4/+4
2018-01-24[X86] Rename 256-bit VFRCZ instructions to have the Y before the rr/rm to mat...Craig Topper2-4/+4
2018-01-24[X86] Remove redundant regular expression from the Znver1 scheduler model. NFCCraig Topper1-1/+0
2018-01-24[NFC] fix trivial typos in commentsHiroshi Inoue7-8/+8
2018-01-24[X86] Use ISD::SIGN_EXTEND instead of X86ISD::VSEXT for mask to xmm/ymm/zmm c...Craig Topper2-3/+21
2018-01-24[Dominators] Introduce DomTree verification levelsJakub Kuderski4-46/+102
2018-01-24Don't assume a null GV is local for ELF and MachO.Rafael Espindola7-27/+34
2018-01-24Remove set but unused variable IsUndef.Eric Christopher1-2/+1
2018-01-24X86: Update isVectorShiftByScalarCheap with cases covered by AVX512BWZvi Rackover2-10/+32
2018-01-24[GISel]: Remove redundant copies at the end of ISelAditya Nandakumar15-83/+75
2018-01-24[WebAssembly] Add minor helper functions to WasmObjectFileSam Clegg2-9/+21
2018-01-24AArch64: Cyclone: Remove SlowMisaligned128Store tuning flagMatthias Braun5-15/+12
2018-01-23[llvm-readobj] Fix double 0x prefix in RVA table printing after r321527Reid Kleckner1-1/+1
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