diff options
| author | Eric Christopher <echristo@gmail.com> | 2015-02-26 00:00:24 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2015-02-26 00:00:24 +0000 |
| commit | a01bc6a59fcb48684b40bb6090b911935d0b6630 (patch) | |
| tree | abef9d6705a58951bfe73924a7dcc7b30ab155d9 /lib/Target/XCore | |
| parent | e9a49d61ac316262c3725750047fe22b13585c63 (diff) | |
Remove an argument-less call to getSubtargetImpl from TargetLoweringBase.
This required plumbing a TargetRegisterInfo through computeRegisterProperties
and into findRepresentativeClass which uses it for register class
iteration. This required passing a subtarget into a few target specific
initializations of TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230583 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
| -rw-r--r-- | lib/Target/XCore/XCoreISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index d5a63547de6..4ec2172dd5e 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -76,7 +76,7 @@ XCoreTargetLowering::XCoreTargetLowering(const TargetMachine &TM, addRegisterClass(MVT::i32, &XCore::GRRegsRegClass); // Compute derived properties from the register classes - computeRegisterProperties(); + computeRegisterProperties(Subtarget.getRegisterInfo()); // Division is expensive setIntDivIsCheap(false); |