summaryrefslogtreecommitdiff
path: root/lib/Target/XCore
diff options
context:
space:
mode:
authorDaniel Jasper <djasper@google.com>2015-04-28 13:38:35 +0000
committerDaniel Jasper <djasper@google.com>2015-04-28 13:38:35 +0000
commit515cc265c96317bb4275939a90a3d723f10e7a23 (patch)
treef5d9cccfd56218797744f5bd715fc0f7d41bb0b1 /lib/Target/XCore
parentf9fc5457577cb71579cac107e5d493621b8ca371 (diff)
Revert "[DebugInfo] Add debug locations to constant SD nodes"
This breaks a test: http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/23870 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235987 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
-rw-r--r--lib/Target/XCore/XCoreISelDAGToDAG.cpp13
-rw-r--r--lib/Target/XCore/XCoreISelLowering.cpp115
-rw-r--r--lib/Target/XCore/XCoreInstrInfo.td11
3 files changed, 65 insertions, 74 deletions
diff --git a/lib/Target/XCore/XCoreISelDAGToDAG.cpp b/lib/Target/XCore/XCoreISelDAGToDAG.cpp
index f5b180b1ac0..5c7ea5e3640 100644
--- a/lib/Target/XCore/XCoreISelDAGToDAG.cpp
+++ b/lib/Target/XCore/XCoreISelDAGToDAG.cpp
@@ -47,8 +47,8 @@ namespace {
/// getI32Imm - Return a target constant with the specified value, of type
/// i32.
- inline SDValue getI32Imm(unsigned Imm, SDLoc dl) {
- return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
+ inline SDValue getI32Imm(unsigned Imm) {
+ return CurDAG->getTargetConstant(Imm, MVT::i32);
}
inline bool immMskBitp(SDNode *inN) const {
@@ -90,7 +90,7 @@ bool XCoreDAGToDAGISel::SelectADDRspii(SDValue Addr, SDValue &Base,
FrameIndexSDNode *FIN = nullptr;
if ((FIN = dyn_cast<FrameIndexSDNode>(Addr))) {
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
- Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);
+ Offset = CurDAG->getTargetConstant(0, MVT::i32);
return true;
}
if (Addr.getOpcode() == ISD::ADD) {
@@ -100,8 +100,7 @@ bool XCoreDAGToDAGISel::SelectADDRspii(SDValue Addr, SDValue &Base,
&& (CN->getSExtValue() % 4 == 0 && CN->getSExtValue() >= 0)) {
// Constant positive word offset from frame index
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
- Offset = CurDAG->getTargetConstant(CN->getSExtValue(), SDLoc(Addr),
- MVT::i32);
+ Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
return true;
}
}
@@ -139,7 +138,7 @@ SDNode *XCoreDAGToDAGISel::Select(SDNode *N) {
if (immMskBitp(N)) {
// Transformation function: get the size of a mask
// Look for the first non-zero bit
- SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val), dl);
+ SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val));
return CurDAG->getMachineNode(XCore::MKMSK_rus, dl,
MVT::i32, MskSize);
}
@@ -257,7 +256,7 @@ SDNode *XCoreDAGToDAGISel::SelectBRIND(SDNode *N) {
// after with clrsr 1. If any resources owned by the thread are ready an event
// will be taken. If no resource is ready we branch to the address which was
// the operand to the checkevent intrinsic.
- SDValue constOne = getI32Imm(1, dl);
+ SDValue constOne = getI32Imm(1);
SDValue Glue =
SDValue(CurDAG->getMachineNode(XCore::SETSR_branch_u6, dl, MVT::Glue,
constOne, Chain), 0);
diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp
index cf1822d0938..c4e3bb8da6d 100644
--- a/lib/Target/XCore/XCoreISelLowering.cpp
+++ b/lib/Target/XCore/XCoreISelLowering.cpp
@@ -298,7 +298,7 @@ LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const
GA = getGlobalAddressWrapper(GA, GV, DAG);
// Handle the rest of the offset.
if (Offset != FoldedOffset) {
- SDValue Remaining = DAG.getConstant(Offset - FoldedOffset, DL, MVT::i32);
+ SDValue Remaining = DAG.getConstant(Offset - FoldedOffset, MVT::i32);
GA = DAG.getNode(ISD::ADD, DL, MVT::i32, GA, Remaining);
}
return GA;
@@ -368,7 +368,7 @@ LowerBR_JT(SDValue Op, SelectionDAG &DAG) const
}
assert((NumEntries >> 31) == 0);
SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index,
- DAG.getConstant(1, dl, MVT::i32));
+ DAG.getConstant(1, MVT::i32));
return DAG.getNode(XCoreISD::BR_JT32, dl, MVT::Other, Chain, TargetJT,
ScaledIndex);
}
@@ -393,12 +393,12 @@ lowerLoadWordFromAlignedBasePlusOffset(SDLoc DL, SDValue Chain, SDValue Base,
HighOffset);
} else {
LowAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base,
- DAG.getConstant(LowOffset, DL, MVT::i32));
+ DAG.getConstant(LowOffset, MVT::i32));
HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base,
- DAG.getConstant(HighOffset, DL, MVT::i32));
+ DAG.getConstant(HighOffset, MVT::i32));
}
- SDValue LowShift = DAG.getConstant((Offset - LowOffset) * 8, DL, MVT::i32);
- SDValue HighShift = DAG.getConstant((HighOffset - Offset) * 8, DL, MVT::i32);
+ SDValue LowShift = DAG.getConstant((Offset - LowOffset) * 8, MVT::i32);
+ SDValue HighShift = DAG.getConstant((HighOffset - Offset) * 8, MVT::i32);
SDValue Low = DAG.getLoad(getPointerTy(), DL, Chain,
LowAddr, MachinePointerInfo(),
@@ -469,14 +469,14 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
LD->isVolatile(), LD->isNonTemporal(),
LD->isInvariant(), 2);
SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr,
- DAG.getConstant(2, DL, MVT::i32));
+ DAG.getConstant(2, MVT::i32));
SDValue High = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain,
HighAddr,
LD->getPointerInfo().getWithOffset(2),
MVT::i16, LD->isVolatile(),
LD->isNonTemporal(), LD->isInvariant(), 2);
SDValue HighShifted = DAG.getNode(ISD::SHL, DL, MVT::i32, High,
- DAG.getConstant(16, DL, MVT::i32));
+ DAG.getConstant(16, MVT::i32));
SDValue Result = DAG.getNode(ISD::OR, DL, MVT::i32, Low, HighShifted);
Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Low.getValue(1),
High.getValue(1));
@@ -529,13 +529,13 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) const
if (ST->getAlignment() == 2) {
SDValue Low = Value;
SDValue High = DAG.getNode(ISD::SRL, dl, MVT::i32, Value,
- DAG.getConstant(16, dl, MVT::i32));
+ DAG.getConstant(16, MVT::i32));
SDValue StoreLow = DAG.getTruncStore(Chain, dl, Low, BasePtr,
ST->getPointerInfo(), MVT::i16,
ST->isVolatile(), ST->isNonTemporal(),
2);
SDValue HighAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, BasePtr,
- DAG.getConstant(2, dl, MVT::i32));
+ DAG.getConstant(2, MVT::i32));
SDValue StoreHigh = DAG.getTruncStore(Chain, dl, High, HighAddr,
ST->getPointerInfo().getWithOffset(2),
MVT::i16, ST->isVolatile(),
@@ -573,7 +573,7 @@ LowerSMUL_LOHI(SDValue Op, SelectionDAG &DAG) const
SDLoc dl(Op);
SDValue LHS = Op.getOperand(0);
SDValue RHS = Op.getOperand(1);
- SDValue Zero = DAG.getConstant(0, dl, MVT::i32);
+ SDValue Zero = DAG.getConstant(0, MVT::i32);
SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl,
DAG.getVTList(MVT::i32, MVT::i32), Zero, Zero,
LHS, RHS);
@@ -590,7 +590,7 @@ LowerUMUL_LOHI(SDValue Op, SelectionDAG &DAG) const
SDLoc dl(Op);
SDValue LHS = Op.getOperand(0);
SDValue RHS = Op.getOperand(1);
- SDValue Zero = DAG.getConstant(0, dl, MVT::i32);
+ SDValue Zero = DAG.getConstant(0, MVT::i32);
SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl,
DAG.getVTList(MVT::i32, MVT::i32), LHS, RHS,
Zero, Zero);
@@ -675,13 +675,13 @@ TryExpandADDWithMul(SDNode *N, SelectionDAG &DAG) const
SDLoc dl(N);
SDValue LL, RL, AddendL, AddendH;
LL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Mul.getOperand(0), DAG.getConstant(0, dl, MVT::i32));
+ Mul.getOperand(0), DAG.getConstant(0, MVT::i32));
RL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Mul.getOperand(1), DAG.getConstant(0, dl, MVT::i32));
+ Mul.getOperand(1), DAG.getConstant(0, MVT::i32));
AddendL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Other, DAG.getConstant(0, dl, MVT::i32));
+ Other, DAG.getConstant(0, MVT::i32));
AddendH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Other, DAG.getConstant(1, dl, MVT::i32));
+ Other, DAG.getConstant(1, MVT::i32));
APInt HighMask = APInt::getHighBitsSet(64, 32);
unsigned LHSSB = DAG.ComputeNumSignBits(Mul.getOperand(0));
unsigned RHSSB = DAG.ComputeNumSignBits(Mul.getOperand(1));
@@ -704,9 +704,9 @@ TryExpandADDWithMul(SDNode *N, SelectionDAG &DAG) const
}
SDValue LH, RH;
LH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Mul.getOperand(0), DAG.getConstant(1, dl, MVT::i32));
+ Mul.getOperand(0), DAG.getConstant(1, MVT::i32));
RH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Mul.getOperand(1), DAG.getConstant(1, dl, MVT::i32));
+ Mul.getOperand(1), DAG.getConstant(1, MVT::i32));
SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl,
DAG.getVTList(MVT::i32, MVT::i32), AddendH,
AddendL, LL, RL);
@@ -735,22 +735,18 @@ ExpandADDSUB(SDNode *N, SelectionDAG &DAG) const
// Extract components
SDValue LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- N->getOperand(0),
- DAG.getConstant(0, dl, MVT::i32));
+ N->getOperand(0), DAG.getConstant(0, MVT::i32));
SDValue LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- N->getOperand(0),
- DAG.getConstant(1, dl, MVT::i32));
+ N->getOperand(0), DAG.getConstant(1, MVT::i32));
SDValue RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- N->getOperand(1),
- DAG.getConstant(0, dl, MVT::i32));
+ N->getOperand(1), DAG.getConstant(0, MVT::i32));
SDValue RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- N->getOperand(1),
- DAG.getConstant(1, dl, MVT::i32));
+ N->getOperand(1), DAG.getConstant(1, MVT::i32));
// Expand
unsigned Opcode = (N->getOpcode() == ISD::ADD) ? XCoreISD::LADD :
XCoreISD::LSUB;
- SDValue Zero = DAG.getConstant(0, dl, MVT::i32);
+ SDValue Zero = DAG.getConstant(0, MVT::i32);
SDValue Lo = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32),
LHSL, RHSL, Zero);
SDValue Carry(Lo.getNode(), 1);
@@ -779,8 +775,7 @@ LowerVAARG(SDValue Op, SelectionDAG &DAG) const
false, false, false, 0);
// Increment the pointer, VAList, to the next vararg
SDValue nextPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAList,
- DAG.getIntPtrConstant(VT.getSizeInBits() / 8,
- dl));
+ DAG.getIntPtrConstant(VT.getSizeInBits() / 8));
// Store the incremented VAList to the legalized pointer
InChain = DAG.getStore(VAList.getValue(1), dl, nextPtr, VAListPtr,
MachinePointerInfo(SV), false, false, 0);
@@ -915,30 +910,30 @@ LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const {
SDValue Addr = Trmp;
SDLoc dl(Op);
- OutChains[0] = DAG.getStore(Chain, dl,
- DAG.getConstant(0x0a3cd805, dl, MVT::i32), Addr,
- MachinePointerInfo(TrmpAddr), false, false, 0);
+ OutChains[0] = DAG.getStore(Chain, dl, DAG.getConstant(0x0a3cd805, MVT::i32),
+ Addr, MachinePointerInfo(TrmpAddr), false, false,
+ 0);
Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp,
- DAG.getConstant(4, dl, MVT::i32));
- OutChains[1] = DAG.getStore(Chain, dl,
- DAG.getConstant(0xd80456c0, dl, MVT::i32), Addr,
- MachinePointerInfo(TrmpAddr, 4), false, false, 0);
+ DAG.getConstant(4, MVT::i32));
+ OutChains[1] = DAG.getStore(Chain, dl, DAG.getConstant(0xd80456c0, MVT::i32),
+ Addr, MachinePointerInfo(TrmpAddr, 4), false,
+ false, 0);
Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp,
- DAG.getConstant(8, dl, MVT::i32));
- OutChains[2] = DAG.getStore(Chain, dl,
- DAG.getConstant(0x27fb0a3c, dl, MVT::i32), Addr,
- MachinePointerInfo(TrmpAddr, 8), false, false, 0);
+ DAG.getConstant(8, MVT::i32));
+ OutChains[2] = DAG.getStore(Chain, dl, DAG.getConstant(0x27fb0a3c, MVT::i32),
+ Addr, MachinePointerInfo(TrmpAddr, 8), false,
+ false, 0);
Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp,
- DAG.getConstant(12, dl, MVT::i32));
+ DAG.getConstant(12, MVT::i32));
OutChains[3] = DAG.getStore(Chain, dl, Nest, Addr,
MachinePointerInfo(TrmpAddr, 12), false, false,
0);
Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp,
- DAG.getConstant(16, dl, MVT::i32));
+ DAG.getConstant(16, MVT::i32));
OutChains[4] = DAG.getStore(Chain, dl, FPtr, Addr,
MachinePointerInfo(TrmpAddr, 16), false, false,
0);
@@ -1101,7 +1096,7 @@ LowerCallResult(SDValue Chain, SDValue InFlag,
int offset = ResultMemLocs[i].first;
unsigned index = ResultMemLocs[i].second;
SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other);
- SDValue Ops[] = { Chain, DAG.getConstant(offset / 4, dl, MVT::i32) };
+ SDValue Ops[] = { Chain, DAG.getConstant(offset / 4, MVT::i32) };
SDValue load = DAG.getNode(XCoreISD::LDWSP, dl, VTs, Ops);
InVals[index] = load;
MemOpChains.push_back(load.getValue(1));
@@ -1150,7 +1145,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
// Get a count of how many bytes are to be pushed on the stack.
unsigned NumBytes = RetCCInfo.getNextStackOffset();
- Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, dl,
+ Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes,
getPointerTy(), true), dl);
SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
@@ -1187,8 +1182,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
MemOpChains.push_back(DAG.getNode(XCoreISD::STWSP, dl, MVT::Other,
Chain, Arg,
- DAG.getConstant(Offset/4, dl,
- MVT::i32)));
+ DAG.getConstant(Offset/4, MVT::i32)));
}
}
@@ -1239,9 +1233,8 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
// Create the CALLSEQ_END node.
Chain = DAG.getCALLSEQ_END(Chain,
- DAG.getConstant(NumBytes, dl, getPointerTy(),
- true),
- DAG.getConstant(0, dl, getPointerTy(), true),
+ DAG.getConstant(NumBytes, getPointerTy(), true),
+ DAG.getConstant(0, getPointerTy(), true),
InFlag, dl);
InFlag = Chain.getValue(1);
@@ -1429,7 +1422,7 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
InVals.push_back(FIN);
MemOps.push_back(DAG.getMemcpy(Chain, dl, FIN, ArgDI->SDV,
- DAG.getConstant(Size, dl, MVT::i32),
+ DAG.getConstant(Size, MVT::i32),
Align, false, false, false,
MachinePointerInfo(),
MachinePointerInfo()));
@@ -1494,7 +1487,7 @@ XCoreTargetLowering::LowerReturn(SDValue Chain,
SmallVector<SDValue, 4> RetOps(1, Chain);
// Return on XCore is always a "retsp 0"
- RetOps.push_back(DAG.getConstant(0, dl, MVT::i32));
+ RetOps.push_back(DAG.getConstant(0, MVT::i32));
SmallVector<SDValue, 4> MemOpChains;
// Handle return values that must be copied to memory.
@@ -1678,9 +1671,9 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
// fold (ladd 0, 0, x) -> 0, x & 1
if (N0C && N0C->isNullValue() && N1C && N1C->isNullValue()) {
- SDValue Carry = DAG.getConstant(0, dl, VT);
+ SDValue Carry = DAG.getConstant(0, VT);
SDValue Result = DAG.getNode(ISD::AND, dl, VT, N2,
- DAG.getConstant(1, dl, VT));
+ DAG.getConstant(1, VT));
SDValue Ops[] = { Result, Carry };
return DAG.getMergeValues(Ops, dl);
}
@@ -1693,7 +1686,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
VT.getSizeInBits() - 1);
DAG.computeKnownBits(N2, KnownZero, KnownOne);
if ((KnownZero & Mask) == Mask) {
- SDValue Carry = DAG.getConstant(0, dl, VT);
+ SDValue Carry = DAG.getConstant(0, VT);
SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2);
SDValue Ops[] = { Result, Carry };
return DAG.getMergeValues(Ops, dl);
@@ -1718,7 +1711,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
if ((KnownZero & Mask) == Mask) {
SDValue Borrow = N2;
SDValue Result = DAG.getNode(ISD::SUB, dl, VT,
- DAG.getConstant(0, dl, VT), N2);
+ DAG.getConstant(0, VT), N2);
SDValue Ops[] = { Result, Borrow };
return DAG.getMergeValues(Ops, dl);
}
@@ -1732,7 +1725,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
VT.getSizeInBits() - 1);
DAG.computeKnownBits(N2, KnownZero, KnownOne);
if ((KnownZero & Mask) == Mask) {
- SDValue Borrow = DAG.getConstant(0, dl, VT);
+ SDValue Borrow = DAG.getConstant(0, VT);
SDValue Result = DAG.getNode(ISD::SUB, dl, VT, N0, N2);
SDValue Ops[] = { Result, Borrow };
return DAG.getMergeValues(Ops, dl);
@@ -1798,13 +1791,13 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
DAG.MaskedValueIsZero(Addend0, HighMask) &&
DAG.MaskedValueIsZero(Addend1, HighMask)) {
SDValue Mul0L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Mul0, DAG.getConstant(0, dl, MVT::i32));
+ Mul0, DAG.getConstant(0, MVT::i32));
SDValue Mul1L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Mul1, DAG.getConstant(0, dl, MVT::i32));
+ Mul1, DAG.getConstant(0, MVT::i32));
SDValue Addend0L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Addend0, DAG.getConstant(0, dl, MVT::i32));
+ Addend0, DAG.getConstant(0, MVT::i32));
SDValue Addend1L = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
- Addend1, DAG.getConstant(0, dl, MVT::i32));
+ Addend1, DAG.getConstant(0, MVT::i32));
SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl,
DAG.getVTList(MVT::i32, MVT::i32), Mul0L, Mul1L,
Addend0L, Addend1L);
@@ -1844,7 +1837,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
bool isTail = isInTailCallPosition(DAG, ST, Chain);
return DAG.getMemmove(Chain, dl, ST->getBasePtr(),
LD->getBasePtr(),
- DAG.getConstant(StoreBits/8, dl, MVT::i32),
+ DAG.getConstant(StoreBits/8, MVT::i32),
Alignment, false, isTail, ST->getPointerInfo(),
LD->getPointerInfo());
}
diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td
index 8110b918c22..8e9bb452560 100644
--- a/lib/Target/XCore/XCoreInstrInfo.td
+++ b/lib/Target/XCore/XCoreInstrInfo.td
@@ -94,34 +94,33 @@ def XCoreMemBarrier : SDNode<"XCoreISD::MEMBARRIER", SDT_XCoreMEMBARRIER,
def div4_xform : SDNodeXForm<imm, [{
// Transformation function: imm/4
assert(N->getZExtValue() % 4 == 0);
- return getI32Imm(N->getZExtValue()/4, SDLoc(N));
+ return getI32Imm(N->getZExtValue()/4);
}]>;
def msksize_xform : SDNodeXForm<imm, [{
// Transformation function: get the size of a mask
assert(isMask_32(N->getZExtValue()));
// look for the first non-zero bit
- return getI32Imm(32 - countLeadingZeros((uint32_t)N->getZExtValue()),
- SDLoc(N));
+ return getI32Imm(32 - countLeadingZeros((uint32_t)N->getZExtValue()));
}]>;
def neg_xform : SDNodeXForm<imm, [{
// Transformation function: -imm
uint32_t value = N->getZExtValue();
- return getI32Imm(-value, SDLoc(N));
+ return getI32Imm(-value);
}]>;
def bpwsub_xform : SDNodeXForm<imm, [{
// Transformation function: 32-imm
uint32_t value = N->getZExtValue();
- return getI32Imm(32 - value, SDLoc(N));
+ return getI32Imm(32-value);
}]>;
def div4neg_xform : SDNodeXForm<imm, [{
// Transformation function: -imm/4
uint32_t value = N->getZExtValue();
assert(-value % 4 == 0);
- return getI32Imm(-value/4, SDLoc(N));
+ return getI32Imm(-value/4);
}]>;
def immUs4Neg : PatLeaf<(imm), [{