diff options
| author | Craig Topper <craig.topper@gmail.com> | 2015-10-18 05:15:34 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2015-10-18 05:15:34 +0000 |
| commit | 44bf343ec1420b3505aab17c7953d5f68263dee1 (patch) | |
| tree | 45d122608a3df870d26328d2925ce9486d8d743c /lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | |
| parent | 2682e3480eea6110e2c06d3913f5e1fb227c274c (diff) | |
Make a bunch of static arrays const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250642 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/AArch64ISelDAGToDAG.cpp')
| -rw-r--r-- | lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index e5293f011ba..7b700323687 100644 --- a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -1282,8 +1282,8 @@ SDNode *AArch64DAGToDAGISel::SelectLoadLane(SDNode *N, unsigned NumVecs, SDValue SuperReg = SDValue(Ld, 0); EVT WideVT = RegSeq.getOperand(1)->getValueType(0); - static unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, - AArch64::qsub3 }; + static const unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, + AArch64::qsub2, AArch64::qsub3 }; for (unsigned i = 0; i < NumVecs; ++i) { SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); if (Narrow) @@ -1335,8 +1335,8 @@ SDNode *AArch64DAGToDAGISel::SelectPostLoadLane(SDNode *N, unsigned NumVecs, Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); } else { EVT WideVT = RegSeq.getOperand(1)->getValueType(0); - static unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, - AArch64::qsub3 }; + static const unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, + AArch64::qsub2, AArch64::qsub3 }; for (unsigned i = 0; i < NumVecs; ++i) { SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); |