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| author | Sanjay Patel <spatel@rotateright.com> | 2015-12-07 23:34:30 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-12-07 23:34:30 +0000 |
| commit | afd3f07154466b8707b767bfb97ce5672a3a1f17 (patch) | |
| tree | 90ea6b3853ac85e8fe8f118b59d93c2184f6289a /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | e826a2ef86c0e89c60d7a4fa792dbbb0358e030e (diff) | |
fix return values to match bool return type; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254968 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 10fb334c4c6..97a9646c323 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3888,10 +3888,10 @@ static bool matchRotateSub(SDValue Pos, SDValue Neg, unsigned EltSize) { // Check whether Neg has the form (sub NegC, NegOp1) for some NegC and NegOp1. if (Neg.getOpcode() != ISD::SUB) - return 0; + return false; ConstantSDNode *NegC = isConstOrConstSplat(Neg.getOperand(0)); if (!NegC) - return 0; + return false; SDValue NegOp1 = Neg.getOperand(1); // On the RHS of [A], if Pos is Pos' & (EltSize - 1), just replace Pos with |