diff options
author | Jordan Justen <jordan.l.justen@intel.com> | 2024-04-30 11:19:36 -0700 |
---|---|---|
committer | Jordan Justen <jordan.l.justen@intel.com> | 2024-06-27 14:36:05 -0700 |
commit | 590acbde65cf8bb44604db773cd2279d00c17638 (patch) | |
tree | d854ab0d045f15fe6a2a3e31a95d6029786e26fe | |
parent | 746f41e70514bcb896f90bd7c7e765e097902285 (diff) |
intel/brw: Retype some regs to BRW_TYPE_UD for Xe2 indirect accessesxe2-indirect-retype-uint
Following https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28957,
some Xe2 code paths started triggering asserts.
In the cases fixed by this patch, it was because of the assert added
to brw_type_larger_of() in cf8ed9925f2 ("intel/brw: Make a helper for
finding the largest of two types"), and then brw_type_larger_of() is
used in 674e89953f0. (For example, the assert was triggering when the
SHL types differed between D and UD.)
Fixes: 674e89953f0 ("intel/brw: Use new builder helpers that allocate a VGRF destination")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 48eae42a58b..fe22121b3d0 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -2754,7 +2754,7 @@ get_indirect_offset(nir_to_brw_state &ntb, nir_intrinsic_instr *instr) return offset; /* Convert Owords (16-bytes) to bytes */ - return ntb.bld.SHL(offset, brw_imm_ud(4u)); + return ntb.bld.SHL(retype(offset, BRW_TYPE_UD), brw_imm_ud(4u)); } static void @@ -5545,7 +5545,8 @@ emit_urb_indirect_writes_xe2(const fs_builder &bld, nir_intrinsic_instr *instr, payload_srcs[c] = horiz_offset(offset(src, bld, c), write_size * q); fs_reg addr = - wbld.ADD(wbld.SHL(horiz_offset(offset_src, write_size * q), + wbld.ADD(wbld.SHL(retype(horiz_offset(offset_src, write_size * q), + BRW_TYPE_UD), brw_imm_ud(2)), urb_handle); fs_reg srcs[URB_LOGICAL_NUM_SRCS]; @@ -5789,7 +5790,9 @@ emit_urb_indirect_reads_xe2(const fs_builder &bld, nir_intrinsic_instr *instr, for (unsigned q = 0; q < bld.dispatch_width() / 16; q++) { fs_builder wbld = bld.group(16, q); - fs_reg addr = wbld.SHL(horiz_offset(offset_src, 16 * q), brw_imm_ud(2)); + fs_reg addr = wbld.SHL(retype(horiz_offset(offset_src, 16 * q), + BRW_TYPE_UD), + brw_imm_ud(2)); fs_reg srcs[URB_LOGICAL_NUM_SRCS]; srcs[URB_LOGICAL_SRC_HANDLE] = wbld.ADD(addr, urb_handle); |