diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_mipmap_tree.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 |
1 files changed, 26 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index c9f5bb3c3d..f56d6c0c44 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -232,7 +232,8 @@ intel_miptree_create_layout(struct brw_context *brw, GLuint height0, GLuint depth0, bool for_bo, - GLuint num_samples) + GLuint num_samples, + bool force_array_spacing) { struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1); if (!mt) @@ -351,6 +352,7 @@ intel_miptree_create_layout(struct brw_context *brw, _mesa_get_format_base_format(format) == GL_DEPTH_STENCIL && (brw->must_use_separate_stencil || (brw->has_separate_stencil && brw_is_hiz_depth_format(brw, format)))) { + bool separate_lods = brw->gen == 6; mt->stencil_mt = intel_miptree_create(brw, mt->target, MESA_FORMAT_S_UINT8, @@ -361,7 +363,8 @@ intel_miptree_create_layout(struct brw_context *brw, mt->logical_depth0, true, num_samples, - INTEL_MIPTREE_TILING_ANY); + INTEL_MIPTREE_TILING_ANY, + separate_lods); if (!mt->stencil_mt) { intel_miptree_release(&mt); return NULL; @@ -381,6 +384,9 @@ intel_miptree_create_layout(struct brw_context *brw, } } + if (force_array_spacing) + mt->array_spacing_lod0 = true; + brw_miptree_layout(brw, mt); return mt; @@ -494,7 +500,8 @@ intel_miptree_create(struct brw_context *brw, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, - enum intel_miptree_tiling_mode requested_tiling) + enum intel_miptree_tiling_mode requested_tiling, + bool force_array_spacing) { struct intel_mipmap_tree *mt; mesa_format tex_format = format; @@ -541,7 +548,8 @@ intel_miptree_create(struct brw_context *brw, mt = intel_miptree_create_layout(brw, target, format, first_level, last_level, width0, height0, depth0, - false, num_samples); + false, num_samples, + force_array_spacing); /* * pitch == 0 || height == 0 indicates the null texture */ @@ -645,7 +653,7 @@ intel_miptree_create_for_bo(struct brw_context *brw, mt = intel_miptree_create_layout(brw, GL_TEXTURE_2D, format, 0, 0, width, height, 1, - true, 0 /* num_samples */); + true, 0, false); if (!mt) { free(region); return mt; @@ -816,7 +824,7 @@ intel_miptree_create_for_renderbuffer(struct brw_context *brw, mt = intel_miptree_create(brw, GL_TEXTURE_2D, format, 0, 0, width, height, depth, true, num_samples, - INTEL_MIPTREE_TILING_ANY); + INTEL_MIPTREE_TILING_ANY, false); if (!mt) goto fail; @@ -1248,7 +1256,8 @@ intel_miptree_alloc_mcs(struct brw_context *brw, mt->logical_depth0, true, 0 /* num_samples */, - INTEL_MIPTREE_TILING_Y); + INTEL_MIPTREE_TILING_Y, + false); /* From the Ivy Bridge PRM, Vol 2 Part 1 p326: * @@ -1305,7 +1314,8 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw, mt->logical_depth0, true, 0 /* num_samples */, - INTEL_MIPTREE_TILING_Y); + INTEL_MIPTREE_TILING_Y, + false); return mt->mcs_mt; } @@ -1349,6 +1359,10 @@ intel_miptree_alloc_hiz(struct brw_context *brw, struct intel_mipmap_tree *mt) { assert(mt->hiz_mt == NULL); + bool separate_lods = brw->gen == 6; + enum intel_miptree_tiling_mode tiling = + separate_lods ? INTEL_MIPTREE_TILING_Y : INTEL_MIPTREE_TILING_ANY; + //tiling = INTEL_MIPTREE_TILING_ANY; mt->hiz_mt = intel_miptree_create(brw, mt->target, mt->format, @@ -1359,7 +1373,8 @@ intel_miptree_alloc_hiz(struct brw_context *brw, mt->logical_depth0, true, mt->num_samples, - INTEL_MIPTREE_TILING_ANY); + tiling, + separate_lods); if (!mt->hiz_mt) return false; @@ -1785,7 +1800,8 @@ intel_miptree_map_blit(struct brw_context *brw, 0, 0, map->w, map->h, 1, false, 0, - INTEL_MIPTREE_TILING_NONE); + INTEL_MIPTREE_TILING_NONE, + false); if (!map->mt) { fprintf(stderr, "Failed to allocate blit temporary\n"); goto fail; |