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path: root/drivers/gpu/drm
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2017-09-05drm/nouveau/compote: create a compute object to force graphic context creationhmm-nouveauJérôme Glisse2-0/+12
Graphic context is not created until there is an object that reference the engine. Creating a compute class object as no other side effect than pgrah context creation. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-09-05drm/nouveau/compote: add page fault handlerJérôme Glisse1-1/+122
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-09-05drm/nouveau/compote: add helper to map nvkm_vmaJérôme Glisse2-0/+34
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-09-05drm/nouveau/compote: add GPU page fault handlerJérôme Glisse4-0/+185
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-09-05drm/nouveau/compote: add HMM mirror supportJérôme Glisse4-0/+126
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-09-05drm/nouveau/compote: allow to have nvkm_vma not bind to nouveau_boJérôme Glisse1-0/+4
Hackish close your eyes and cover your ears. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-29drm/nouveau/compote: add buffer vma on mmap through device fileJérôme Glisse1-0/+29
Add nvkm_vma when buffer is mmap through device file so that same CPU virtual address can be use on GPU too. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-29drm/nouveau/compote: add channel indirect buffer execute ioctlJérôme Glisse3-13/+71
Channel indirect buffer execution. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-29drm/nouveau/compote: add channel supportJérôme Glisse4-0/+179
Channel infrastructure. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-29drm/nouveau/compote: memory object mmap supportJérôme Glisse4-2/+133
Allow mmap of compote device file to access memory objects. Each memory objects is given a unique range inside the compote device file. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-29drm/nouveau/compote: memory allocation ioctlJérôme Glisse5-1/+198
Add memory allocation ioctl. Very basic and simple linear allocation inside GART. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-29drm/nouveau/compote: GPU compute on top of nouveauJérôme Glisse8-0/+418
Starting with Kepler GPU we can do unified memory for compute. With Pascal we can even transparently share the same virtual address space on the GPU as on the CPU. Compote is an attempt to prototype a new set of API for userspace to leverage those features. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-29drm/nouveau/core/mm: allow to find nvkm_vma from offsetJérôme Glisse4-0/+43
Need this as we can not lookup regular process vma from page table synchronization callback. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-23drm/nouveau/core/mm: allow partial mapping of bo (buffer object)Jérôme Glisse5-11/+24
This allow to create partial mapping of a bo (nvkm_vma). Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-23drm/nouveau/core/mm: allow to create bo vma to fix offset inside vmJérôme Glisse6-0/+129
This allow to create a bo vma (nvkm_vma) at a fix offset inside a vm. Usefull when we want to force same virtual address on CPU and GPU. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-23drm/nouveau/core/mm: convert to u64 tu support bigger address spaceJérôme Glisse2-25/+25
CPU process address space on 64bits architecture is 47bits or bigger hence we need to convert nvkmm_mm to use 64bits integer to support bigger address space. Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2017-08-09fault/gp100: initial implementation of MaxwellFaultBufferABen Skeggs11-0/+371
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mc/gp100-: handle replayable fault interruptBen Skeggs3-2/+22
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09core: define engine for handling replayable faultsBen Skeggs7-0/+12
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/gp100: allow gcc/tex to generate replayable faultsBen Skeggs3-0/+22
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09WIPmmu: handle instance block setupBen Skeggs23-180/+167
We previously required each VMM user to allocate their own page directory and fill in the instance block themselves. It makes more sense to handle this in a common location. WIP: gf100 chicken-and-egg Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/gf100-: implement vmm on top of new baseBen Skeggs9-49/+185
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/nv50,g84: implement vmm on top of new baseBen Skeggs7-8/+158
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/nv44: implement vmm on top of new baseBen Skeggs5-9/+67
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/nv41: implement vmm on top of new baseBen Skeggs4-8/+67
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/nv04: implement vmm on top of new baseBen Skeggs6-17/+116
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu: implement base for new vm managementBen Skeggs7-20/+188
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/gp100: fork from gf100Ben Skeggs4-6/+40
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/g84: fork from nv50Ben Skeggs4-13/+47
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/gf100: allow implementation to be subclassedBen Skeggs2-3/+45
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu/nv50: allow implementation to be subclassedBen Skeggs2-3/+45
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09mmu: automatically handle "un-bootstrapping" of vmmBen Skeggs4-8/+7
Removes the need to expose internals outside of MMU. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-09falcon: use a more reasonable msgqueue timeout valueBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-08-04Merge branch 'drm-fixes-4.13' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie3-21/+24
into drm-fixes Just a few small fixes for 4.13. * 'drm-fixes-4.13' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: Use list_del_init in amdgpu_mn_unregister drm/amdgpu: Fix undue fallthroughs in golden registers initialization drm/amdgpu: fix header on gfx9 clear state
2017-08-02drm/amdgpu: Use list_del_init in amdgpu_mn_unregisterFelix Kuehling1-1/+1
Otherwise bo->shadow_list (which is aliased by bo->mn_list) will not appear empty in amdgpu_ttm_bo_destroy and cause an oops when freeing former userptr BOs. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-02drm/amdgpu: Fix undue fallthroughs in golden registers initializationJean Delvare1-0/+2
As I was staring at the si_init_golden_registers code, I noticed that the Pitcairn initialization silently falls through the Cape Verde initialization, and the Oland initialization falls through the Hainan initialization. However there is no comment stating that this is intentional, and the radeon driver doesn't have any such fallthrough, so I suspect this is not supposed to happen. Signed-off-by: Jean Delvare <jdelvare@suse.de> Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10") Cc: Ken Wang <Qingqing.Wang@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Marek Olšák" <maraeo@gmail.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2017-07-28Merge tag 'exynos-drm-fixes-for-v4.13-rc3' of ↵Dave Airlie6-27/+29
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes Summary: - fix probing fail issue of dsi driver without bridge device. - fix disable sequence of hdmi driver. - trivial cleanups. * tag 'exynos-drm-fixes-for-v4.13-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm: exynos: mark pm functions as __maybe_unused drm/exynos: select CEC_CORE if CEC_NOTIFIER drm/exynos/hdmi: fix disable sequence drm/exynos: mic: add a bridge at probe drm/exynos/dsi: Remove error handling for bridge_node DT parsing drm/exynos: dsi: do not try to find bridge drm: exynos: hdmi: make of_device_ids const. drm: exynos: constify mixer_match_types and *_mxr_drv_data. exynos_drm: Clean up duplicated assignment in exynos_drm_driver
2017-07-28Merge tag 'drm-intel-fixes-2017-07-27' of ↵Dave Airlie10-83/+72
git://anongit.freedesktop.org/git/drm-intel into drm-fixes i915 fixes for -rc3 Bit more than usual since we missed -rc2. 4x cc: stable, 2 gvt patches, but all fairly minor stuff. Last minute rebase was to add a few missing cc: stable, I did prep the pull this morning already and made sure CI approves. * tag 'drm-intel-fixes-2017-07-27' of git://anongit.freedesktop.org/git/drm-intel: drm/i915: Fix bad comparison in skl_compute_plane_wm. drm/i915: Force CPU synchronisation even if userspace requests ASYNC drm/i915: Only skip updating execobject.offset after error drm/i915: Only mark the execobject as pinned on success drm/i915: Remove assertion from raw __i915_vma_unpin() drm/i915/cnl: Fix loadgen select programming on ddi vswing sequence drm/i915: Fix scaler init during CRTC HW state readout drm/i915/selftests: Fix an error handling path in 'mock_gem_device()' drm/i915: Unbreak gpu reset vs. modeset locking drm/i915: Fix cursor updates on some platforms drm/i915: Fix user ptr check size in eb_relocate_vma() drm/i915/gvt: Extend KBL platform support in GVT-g drm/i915/gvt: Fix the vblank timer close issue after shutdown VMs in reverse
2017-07-28Merge tag 'drm-misc-fixes-2017-07-27' of ↵Dave Airlie2-12/+12
git://anongit.freedesktop.org/git/drm-misc into drm-fixes Core Changes: - dp: A few fixes in drm_dp_downstream_debug() (Chris) - rockchip: sanitize the Kconfig dependencies (fallout from EXTCON) (Arnd) - host1x: Free the iommu domain when attach_device fails (Paul) Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Paul Kocialkowski <contact@paulk.fr> * tag 'drm-misc-fixes-2017-07-27' of git://anongit.freedesktop.org/git/drm-misc: gpu: host1x: Free the IOMMU domain when there is no device to attach drm/rockchip: fix Kconfig dependencies drm/dp: Don't trust drm_dp_downstream_id() drm/dp: Fix read pointer for drm_dp_downsteam_debug()
2017-07-27Merge tag 'gvt-fixes-2017-07-26' of https://github.com/01org/gvt-linux into ↵Daniel Vetter2-12/+12
drm-intel-fixes gvt-fixes-2017-07-26 - Turn on KBL support for more SKUs (Jianjun) - Fix vblank timer close bug (Fred) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20170726075621.hrauvik62gi2jecj@zhen-hp.sh.intel.com
2017-07-27drm/i915: Fix bad comparison in skl_compute_plane_wm.Maarten Lankhorst1-2/+2
ddb_allocation && ddb_allocation / blocks_per_line >= 1 is the same as ddb_allocation >= blocks_per_line, so use the latter to simplify this. This fixes the following compiler warning: drivers/gpu/drm/i915/intel_pm.c:4467]: (warning) Comparison of a boolean expression with an integer other than 0 or 1. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes: d555cb5827d6 ("drm/i915/skl+: use linetime latency if ddb size is not available") Cc: "Mahesh Kumar" <mahesh1.kumar@intel.com> Reported-by: David Binderman <dcb314@hotmail.com> Cc: David Binderman <dcb314@hotmail.com> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.13-rc1+ Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com> (cherry picked from commit 54d20ed1fff23c7d2633f01fc788111bf9c51c5d) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170717111355.4523-1-maarten.lankhorst@linux.intel.com Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2017-07-27drm/i915: Force CPU synchronisation even if userspace requests ASYNCChris Wilson3-8/+11
The goal here was to minimise doing any thing or any check inside the kernel that was not strictly required. For a userspace that assumes complete control over the cache domains, the kernel is usually using outdated information and may trigger clflushes where none were required. However, swapping is a situation where userspace has no knowledge of the domain transfer, and will leave the object in the CPU cache. The kernel must flush this out to the backing storage prior to use with the GPU. As we use an asynchronous task tracked by an implicit fence for this, we also need to cancel the ASYNC flag on the object so that the object will wait for the clflush to complete before being executed. This also absolves userspace of the responsibility imposed by commit 77ae9957897d ("drm/i915: Enable userspace to opt-out of implicit fencing") that its needed to ensure that the object was out of the CPU cache prior to use on the GPU. Fixes: 77ae9957897d ("drm/i915: Enable userspace to opt-out of implicit fencing") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101571 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Link: https://patchwork.freedesktop.org/patch/msgid/20170721145037.25105-5-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit 0f46daa1a273779a0b73d768a788ca3f04238f9c) Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/i915: Only skip updating execobject.offset after errorChris Wilson1-3/+3
I was being overly paranoid in not updating the execobject.offset after performing the fallback copy where we set reloc.presumed_offset to -1. The thinking was to ensure that a subsequent NORELOC execbuf would be forced to process the invalid relocations. However this is overkill so long as we *only* update the execobject.offset following a successful update of the relocation value witin the batch. If we have to repeat the execbuf due to a later interruption, then we may skip the relocations on the second pass (honouring NORELOC) since the execobject.offset match the actual offsets (even though reloc.presumed_offset is garbage). Subsequent calls to execbuf with NORELOC should themselves ensure that the reloc.presumed_offset have been corrected in case of future migration. Reporting back the actual execobject.offset, even when reloc.presumed_offset is garbage, ensures that reuse of those objects use the latest information to avoid relocations. Fixes: 2889caa92321 ("drm/i915: Eliminate lots of iterations over the execobjects array") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101635 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170721145037.25105-4-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit 1f727d9e725a408ef58d159c20fb2e51818ff153) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/i915: Only mark the execobject as pinned on successChris Wilson1-3/+3
If we fail to acquire a fence (for old school fenced GPU access) then we unwind the vma reservation, including its pin. However, we were making the execobject as holding the pin before erring out, leading to a double unpin: [ 3193.991802] kernel BUG at drivers/gpu/drm/i915/i915_vma.h:287! [ 3193.998131] invalid opcode: 0000 [#1] PREEMPT SMP [ 3194.002816] Modules linked in: snd_hda_intel i915 vgem snd_hda_codec_analog snd_hda_codec_generic coretemp snd_hda_codec snd_hwdep snd_hda_core snd_pcm lpc_ich mei_me e1000e mei prime_numbers ptp pps_core [last unloaded: i915] [ 3194.022841] CPU: 0 PID: 8123 Comm: kms_flip Tainted: G U 4.13.0-rc1-CI-CI_DRM_471+ #1 [ 3194.031765] Hardware name: Dell Inc. OptiPlex 755 /0PU052, BIOS A04 11/05/2007 [ 3194.040343] task: ffff8800785d4c40 task.stack: ffffc90001768000 [ 3194.046339] RIP: 0010:eb_release_vmas.isra.6+0x119/0x180 [i915] [ 3194.052234] RSP: 0018:ffffc9000176ba80 EFLAGS: 00010246 [ 3194.057439] RAX: 00000000000003c0 RBX: ffff8800710fc2d8 RCX: ffff8800588e4f48 [ 3194.064546] RDX: ffffffff1fffffff RSI: 00000000ffffffff RDI: ffff8800588e00d0 [ 3194.071654] RBP: ffffc9000176bab0 R08: 0000000000000000 R09: 0000000000000000 [ 3194.078761] R10: 0000000000000040 R11: 0000000000000001 R12: ffff880060822f00 [ 3194.085867] R13: 0000000000000310 R14: 00000000000003b8 R15: ffffc9000176bbb0 [ 3194.092975] FS: 00007fd2b94aba40(0000) GS:ffff88007d200000(0000) knlGS:0000000000000000 [ 3194.101033] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 3194.106754] CR2: 00007ffbec3ff000 CR3: 0000000074e67000 CR4: 00000000000006f0 [ 3194.113861] Call Trace: [ 3194.116321] eb_relocate_slow+0x67/0x4e0 [i915] [ 3194.120861] i915_gem_do_execbuffer+0x429/0x1260 [i915] [ 3194.126070] ? lock_acquire+0xb5/0x210 [ 3194.129803] ? __might_fault+0x39/0x90 [ 3194.133563] i915_gem_execbuffer2+0x9b/0x1b0 [i915] [ 3194.138447] ? i915_gem_execbuffer+0x2b0/0x2b0 [i915] [ 3194.143478] drm_ioctl_kernel+0x64/0xb0 [ 3194.147298] drm_ioctl+0x2cd/0x390 [ 3194.150710] ? i915_gem_execbuffer+0x2b0/0x2b0 [i915] [ 3194.155741] ? finish_task_switch+0xa5/0x210 [ 3194.159993] ? finish_task_switch+0x6a/0x210 [ 3194.164247] do_vfs_ioctl+0x90/0x670 [ 3194.167806] ? entry_SYSCALL_64_fastpath+0x5/0xb1 [ 3194.172492] ? __this_cpu_preempt_check+0x13/0x20 [ 3194.177176] ? trace_hardirqs_on_caller+0xe7/0x1c0 [ 3194.181946] SyS_ioctl+0x3c/0x70 [ 3194.185159] entry_SYSCALL_64_fastpath+0x1c/0xb1 [ 3194.189756] RIP: 0033:0x7fd2b76a8587 [ 3194.193314] RSP: 002b:00007fff074845b8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 3194.200855] RAX: ffffffffffffffda RBX: ffffffff8146da43 RCX: 00007fd2b76a8587 [ 3194.207962] RDX: 00007fff074846e0 RSI: 0000000040406469 RDI: 0000000000000003 [ 3194.215068] RBP: ffffc9000176bf88 R08: 0000000000000000 R09: 0000000000000003 [ 3194.222175] R10: 00007fd2b796bb58 R11: 0000000000000246 R12: 00007fff07484880 [ 3194.229280] R13: 0000000000000003 R14: 0000000040406469 R15: 0000000000000000 [ 3194.236386] ? __this_cpu_preempt_check+0x13/0x20 [ 3194.241070] Code: 24 b0 00 00 00 48 85 c9 0f 84 6c ff ff ff 8b 41 20 85 c0 7e 73 83 e8 01 89 41 20 41 8b 84 24 e8 00 00 00 a8 0f 0f 85 5f ff ff ff <0f> 0b 48 83 c4 08 5b 41 5c 41 5d 41 5e 41 5f 5d f3 c3 49 8b 84 [ 3194.259943] RIP: eb_release_vmas.isra.6+0x119/0x180 [i915] RSP: ffffc9000176ba80 [ 3194.268047] ---[ end trace 1d7348c6575d8800 ]--- [ 3673.658819] softdog: Initiating panic [ 3673.662471] Kernel panic - not syncing: Software Watchdog Timer expired [ 3673.669066] Kernel Offset: disabled [ 3673.672541] Rebooting in 1 seconds.. Reported-by: Tomi Sarvela <tomi.p.sarvela@intel.com> Fixes: 2889caa92321 ("drm/i915: Eliminate lots of iterations over the execobjects array") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170721145037.25105-3-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit 1da7b54c46bcfe5484af0b27d8c9003b238031b0) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/i915: Remove assertion from raw __i915_vma_unpin()Chris Wilson1-1/+1
After we detect a i915_vma pin overflow, we call __i915_vma_unpin to cleanup. However, on an overflow the pin_count bitfield will be zero, triggering an assertion, even though we the intention is to merely warn and report the error back to the user (as historically the culprit has be a leak in the display code). Fixes: 20dfbde463c8 ("drm/i915: Wrap vma->pin_count accessors with small inline helpers") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170721145037.25105-2-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit 67fddd902b8e37b15a905c287ce4e40f52a564af) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/i915/cnl: Fix loadgen select programming on ddi vswing sequenceNavare, Manasi D1-2/+2
The condition for setting the Loadgen Select bit of PORT_TX_DW4 register during DDI Vswing Sequence should be Bit rate <=6 GHz whereas the existing code checks only Bit Rate < 6GHz. This patch fixes this condition. While at it also remove the redundant paranthesis. Fixes: cf54ca8bc567 ("drm/i915/cnl: Implement voltage swing sequence.") Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1500329122-32662-1-git-send-email-manasi.d.navare@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit a8e45a1c42d11597e975f3e5f2fe182f90cdaa7f) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/i915: Fix scaler init during CRTC HW state readoutImre Deak1-7/+7
The scaler allocation code depends on a non-zero default value for the crtc scaler_id, so make sure we initialize the scaler state accordingly even if the crtc is off. This fixes at least an initial YUV420 modeset (added in a follow-up patchset by Shashank) when booting with the screen off: after the initial HW readout and modeset which enables the scaler a subsequent modeset will disable the scaler which isn't properly allocated. This results in a funky HW state where the pipe scaler HW registers can't be modified and the normally black screen is grey and shifted to the right or jitters. The problem was revealed by Shashank's YUV420 patchset and first reported by Ville. v2: - In the stable tag also include versions which need backporting (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Chandra Konduru <chandra.konduru@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: <stable@vger.kernel.org> # 4.2.x Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Fixes: a1b2278e4dfc ("drm/i915: skylake panel fitting using shared scalers") Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170720112820.26816-1-imre.deak@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit 5fb9dadf336f3590c799e8cbde348215dccc2aa2) Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/i915/selftests: Fix an error handling path in 'mock_gem_device()'Christophe JAILLET1-1/+1
Goto the right label in case of error, otherwise there is a leak. This has been introduced by c5cf9a9147ff. In this patch a goto has not been updated. Fixes: c5cf9a9147ff ("drm/i915: Create a kmem_cache to allocate struct i915_priolist from") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://patchwork.freedesktop.org/patch/msgid/20170719223503.30580-1-christophe.jaillet@wanadoo.fr Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit a5ec7fe81a6ec38cb8b8a798d0552cbcadce7aa9) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/i915: Unbreak gpu reset vs. modeset lockingDaniel Vetter1-42/+18
Taking the modeset locks unconditionally isn't the greatest idea, because atm that part is still broken and times out (and then atomic keels over). And there's really no reason to do so, the old code didn't do that either. To make the patch a bit simpler let's also nuke 2 cases that are only around for the old mmioflip paths. Atomic nonblocking workers will not die (minus bugs) when a gpu reset happens. And of course this doesn't fix any of the gpu reset vs. modeset deadlock fun, but it at least stop modern CI machines from keeling over all over the place for no reason at all. And we still have the explicit testcases to run the fake gpu reset, so coverage isn't that much worse. v2: Split out additional changes on top, restrict this to purely reducing the critical section of modeset locks. v2: Review from Maarten - update comments - don't oops when state is NULL in intel_finish_reset, but try to at least still drop locks properly. The hw is going to be toast anyway. Fixes: 739748939974 ("drm/i915: Fix modeset handling during gpu reset, v5.") Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170719125502.25696-3-daniel.vetter@ffwll.ch (cherry picked from commit ce87ea15ebc60a9f8f156b2549f7b2cf7fe48d04) Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-27drm/amdgpu: fix header on gfx9 clear stateAlex Deucher1-20/+21
This got missed when we open sourced this. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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