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Age	Commit message (Collapse)	Author	Files	Lines
2015-05-12	[X86] DAGCombine should not assume arbitrary vector types are simple	Michael Kuperstein	1	-0/+11
	The X86-specific DAGCombine for stores should not assume vector types are always simple. This fixes PR23476. Differential Revision: http://reviews.llvm.org/D9659 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237097 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-22	[x86] allow 64-bit extracted vector element integer stores on a 32-bit system	Sanjay Patel	1	-1/+40
	With SSE2, we can generate a 'movq' or other 64-bit store op on a 32-bit system even though 64-bit integers are not legal types. So instead of producing this: pshufd $229, %xmm0, %xmm1 ## xmm1 = xmm0[1,1,2,3] movd %xmm0, (%eax) movd %xmm1, 4(%eax) We can do: movq %xmm0, (%eax) This is a fix for the problem noted in D7296. Differential Revision: http://reviews.llvm.org/D9134 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235460 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-20	use update_llc_test_checks.py to tighten checking	Sanjay Patel	1	-13/+22
	Also, replace win and linux runs with a generic run because that makes no difference in what this test is checking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27	[opaque pointer type] Add textual IR support for explicit type parameter to ↵	David Blaikie	1	-1/+1
	load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=\|:\|^)\sload (?:atomic )?(?:volatile )?(.?))(\| addrspace$\d+$ )\($\| (?:%\|@\|null\|undef\|blockaddress\|getelementptr\|addrspacecast\|bitcast\|inttoptr\|\[\[[a-zA-Z]\|\{\{).$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-12	Make test independent of scheduling	Nico Rieck	1	-1/+1
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199055 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-12	Fix non-deterministic SDNodeOrder-dependent codegen	Nico Rieck	1	-1/+1
	Reset SelectionDAGBuilder's SDNodeOrder to ensure deterministic code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-16	test/CodeGen/X86: FileCheck-ize and add actions for x86_64-linux and ↵	NAKAMURA Takumi	1	-2/+6
	x86_64-win32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08	Eliminate more uses of llvm-as and llvm-dis.	Dan Gohman	1	-2/+2
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12	Typo.	Evan Cheng	1	-1/+1
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12	On x86, if the only use of a i64 load is a i64 store, generate a pair of ↵	Evan Cheng	1	-0/+13
	double load and store instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66776 91177308-0d34-0410-b5e6-96231b3b80d8