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| author | Quentin Colombet <qcolombet@apple.com> | 2016-03-08 01:48:08 +0000 |
|---|---|---|
| committer | Quentin Colombet <qcolombet@apple.com> | 2016-03-08 01:48:08 +0000 |
| commit | 520819d99753bead5656c578cc4b721975b076b7 (patch) | |
| tree | 72996fe90dc114ecf4e6e78012a4b293d051d83b /test | |
| parent | 76cdab6f0a44e3ef78ac4fcaecf9a62348251ddc (diff) | |
[AArch64][GlobalISel] Add a test case for the IRTranslator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262898 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/AArch64/arm64-irtranslator.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/arm64-irtranslator.ll b/test/CodeGen/AArch64/arm64-irtranslator.ll new file mode 100644 index 00000000000..ffae84c97da --- /dev/null +++ b/test/CodeGen/AArch64/arm64-irtranslator.ll @@ -0,0 +1,18 @@ +; RUN: llc -stop-after=irtranslator -global-isel %s -o - 2>&1 | FileCheck %s +; REQUIRES: global-isel +; This file checks that the translation from llvm IR to generic MachineInstr +; is correct. +target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" +target triple = "aarch64-apple-ios" + +; Tests for add. +; CHECK: name: addi64 +; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0 +; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1 +; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_ADD i64 [[ARG1]], [[ARG2]] +; CHECK-NEXT: %x0 = COPY [[RES]] +; CHECK-NEXT: RET_ReallyLR implicit %x0 +define i64 @addi64(i64 %arg1, i64 %arg2) { + %res = add i64 %arg1, %arg2 + ret i64 %res +} |