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| author | Junmo Park <junmoz.park@samsung.com> | 2016-02-25 00:23:27 +0000 |
|---|---|---|
| committer | Junmo Park <junmoz.park@samsung.com> | 2016-02-25 00:23:27 +0000 |
| commit | 43a6e3e0754efca5fdab00ef8ccd2ab6edea0601 (patch) | |
| tree | 6578b57f2a40501da39de87867644ac5159285d6 | |
| parent | 15c5da8101759e640f928355e7a489726ec64118 (diff) | |
[CodeGenPrepare] Remove load-based heuristic
Summary:
Both the hardware and LLVM have changed since 2012.
Now, load-based heuristic don't show big differences any more on OoO cores.
There is no notable regressons and improvements on spec2000/2006. (Cortex-A57, Core i5).
Reviewers: spatel, zansari
Differential Revision: http://reviews.llvm.org/D16836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261809 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/CodeGenPrepare.cpp | 11 | ||||
| -rw-r--r-- | test/CodeGen/AArch64/a57-csel.ll | 5 | ||||
| -rw-r--r-- | test/CodeGen/X86/cmov-into-branch.ll | 19 | ||||
| -rw-r--r-- | test/Transforms/CodeGenPrepare/X86/select.ll | 9 |
4 files changed, 7 insertions, 37 deletions
diff --git a/lib/CodeGen/CodeGenPrepare.cpp b/lib/CodeGen/CodeGenPrepare.cpp index 4b9cc003ee2..7fc018556e1 100644 --- a/lib/CodeGen/CodeGenPrepare.cpp +++ b/lib/CodeGen/CodeGenPrepare.cpp @@ -4477,17 +4477,6 @@ static bool isFormingBranchFromSelectProfitable(const TargetTransformInfo *TTI, if (!Cmp || !Cmp->hasOneUse()) return false; - Value *CmpOp0 = Cmp->getOperand(0); - Value *CmpOp1 = Cmp->getOperand(1); - - // Emit "cmov on compare with a memory operand" as a branch to avoid stalls - // on a load from memory. But if the load is used more than once, do not - // change the select to a branch because the load is probably needed - // regardless of whether the branch is taken or not. - if ((isa<LoadInst>(CmpOp0) && CmpOp0->hasOneUse()) || - (isa<LoadInst>(CmpOp1) && CmpOp1->hasOneUse())) - return true; - // If either operand of the select is expensive and only needed on one side // of the select, we should form a branch. if (sinkSelectOperand(TTI, SI->getTrueValue()) || diff --git a/test/CodeGen/AArch64/a57-csel.ll b/test/CodeGen/AArch64/a57-csel.ll index f5496f77776..3c99a90fe28 100644 --- a/test/CodeGen/AArch64/a57-csel.ll +++ b/test/CodeGen/AArch64/a57-csel.ll @@ -1,8 +1,9 @@ ; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -mcpu=cortex-a57 -aarch64-enable-early-ifcvt=false | FileCheck %s -; Check that the select is expanded into a branch sequence. +; Check that the select isn't expanded into a branch sequence +; when the icmp's first operand %x0 is from load. define i64 @f(i64 %a, i64 %b, i64* %c, i64 %d, i64 %e) { - ; CHECK: cbz + ; CHECK: csel %x0 = load i64, i64* %c %x1 = icmp eq i64 %x0, 0 %x2 = select i1 %x1, i64 %a, i64 %b diff --git a/test/CodeGen/X86/cmov-into-branch.ll b/test/CodeGen/X86/cmov-into-branch.ll index 909440800a5..0fb3d76a15b 100644 --- a/test/CodeGen/X86/cmov-into-branch.ll +++ b/test/CodeGen/X86/cmov-into-branch.ll @@ -1,6 +1,6 @@ ; RUN: llc -march=x86-64 -mcpu=core2 < %s | FileCheck %s -; cmp with single-use load, should not form cmov. +; cmp with single-use load, should not form branch. define i32 @test1(double %a, double* nocapture %b, i32 %x, i32 %y) { %load = load double, double* %b, align 8 %cmp = fcmp olt double %load, %a @@ -8,9 +8,7 @@ define i32 @test1(double %a, double* nocapture %b, i32 %x, i32 %y) { ret i32 %cond ; CHECK-LABEL: test1: ; CHECK: ucomisd -; CHECK-NOT: cmov -; CHECK: j -; CHECK-NOT: cmov +; CHECK: cmovbel } ; Sanity check: no load. @@ -23,19 +21,6 @@ define i32 @test2(double %a, double %b, i32 %x, i32 %y) { ; CHECK: cmov } -; Multiple uses of %a, should not form cmov. -define i32 @test3(i32 %a, i32* nocapture %b, i32 %x) { - %load = load i32, i32* %b, align 4 - %cmp = icmp ult i32 %load, %a - %cond = select i1 %cmp, i32 %a, i32 %x - ret i32 %cond -; CHECK-LABEL: test3: -; CHECK: cmpl -; CHECK-NOT: cmov -; CHECK: j -; CHECK-NOT: cmov -} - ; Multiple uses of the load. define i32 @test4(i32 %a, i32* nocapture %b, i32 %x, i32 %y) { %load = load i32, i32* %b, align 4 diff --git a/test/Transforms/CodeGenPrepare/X86/select.ll b/test/Transforms/CodeGenPrepare/X86/select.ll index a26938ad5ee..15c0772b144 100644 --- a/test/Transforms/CodeGenPrepare/X86/select.ll +++ b/test/Transforms/CodeGenPrepare/X86/select.ll @@ -2,8 +2,7 @@ target triple = "x86_64-unknown-unknown" -; Nothing to sink here, but this gets converted to a branch to -; avoid stalling an out-of-order CPU on a predictable branch. +; Nothing to sink and convert here. define i32 @no_sink(double %a, double* %b, i32 %x, i32 %y) { entry: @@ -15,11 +14,7 @@ entry: ; CHECK-LABEL: @no_sink( ; CHECK: %load = load double, double* %b, align 8 ; CHECK: %cmp = fcmp olt double %load, %a -; CHECK: br i1 %cmp, label %select.end, label %select.false -; CHECK: select.false: -; CHECK: br label %select.end -; CHECK: select.end: -; CHECK: %sel = phi i32 [ %x, %entry ], [ %y, %select.false ] +; CHECK: %sel = select i1 %cmp, i32 %x, i32 %y ; CHECK: ret i32 %sel } |