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AgeCommit message (Expand)AuthorFilesLines
2017-01-05add a basic greedy heuristicir3-schedConnor Abbott1-5/+33
2017-01-05document delay_calc_srcn() betterConnor Abbott1-4/+9
2017-01-05fix bug with calculating ipConnor Abbott1-1/+1
2017-01-05fix segfault when regs_count == 0Connor Abbott1-1/+1
2017-01-05ir3: simplify ir3_depth and turn it into ir3_dceConnor Abbott5-79/+46
2017-01-05add sfu/mem sillinessConnor Abbott1-0/+13
2017-01-05remove old descriptionConnor Abbott1-17/+1
2017-01-05more scheduling tweaksConnor Abbott1-52/+36
2017-01-05add new depth calc to schedulerConnor Abbott1-17/+21
2017-01-05ignore array destinationsConnor Abbott1-1/+7
2017-01-05add false dependencies for arraysConnor Abbott1-0/+22
2017-01-05don't need thisConnor Abbott1-8/+1
2017-01-05remove sorting by depthConnor Abbott1-19/+0
2017-01-05schedule input instructions normallyConnor Abbott1-3/+5
2017-01-05fixes fixes fixesConnor Abbott3-2/+7
2017-01-05initialize insertion pointConnor Abbott1-1/+5
2017-01-05ir3: initial scheduler prototypeConnor Abbott3-472/+205
2017-01-04glcpp: Remove illegal characters from testsCarl Worth6-6/+6
2017-01-04glcpp: Exhaustively test all legal characters in GLSLCarl Worth2-0/+154
2017-01-04glcpp: Allow vertical tab and form feed characters in GLSLCarl Worth1-1/+1
2017-01-04glcpp: Add testing for no space between macro name and replacement listCarl Worth2-0/+116
2017-01-04spirv: compute push constant access offset & rangeLionel Landwerlin2-14/+65
2017-01-04spirv: move block_size() definitionLionel Landwerlin1-48/+48
2017-01-04va: call texture_get_handle while the mutex is being heldMarek Olšák1-2/+5
2017-01-04vdpau: call texture_get_handle while the mutex is being heldMarek Olšák2-6/+13
2017-01-04radeonsi: capitalize VM hex addr when dumping buffer listSamuel Pitoiset1-1/+1
2017-01-04i965: remove unused brwInitVtbl declarationTapani Pälli1-5/+0
2017-01-04i965: remove brw_context dependency from intel_batchbuffer_init()Iago Toral Quiroga3-28/+36
2017-01-04i965: make intel_batchbuffer_free() take a batchbuffer as argumentIago Toral Quiroga3-6/+6
2017-01-04i965: make intel_batchbuffer_emit_dword() take a batchbuffer as argumentIago Toral Quiroga2-12/+12
2017-01-04i965: Make intel_bachbuffer_reloc() take a batchbuffer argumentIago Toral Quiroga3-15/+15
2017-01-04nir: fix loop iteration count calculation for floatsTimothy Arceri1-2/+2
2017-01-03gallium/hud: add a path separator between dump directory and filenameEdmondo Tommasina1-1/+2
2017-01-03r600/sb: Fix loop optimization related hangs on egHeiko Przybyl6-30/+68
2017-01-03editorconfig: Fix up the tab rendering width.Eric Anholt1-0/+1
2017-01-03meta: Disable dithering during glGenerateMipmapChad Versace1-0/+1
2017-01-03doc/features.txt: update for freedrenoRomain Failliot1-19/+19
2017-01-03i965: Remove perf monitor/query backendRobert Bragg6-1597/+1
2017-01-03vl/zscan: fix "Fix trivial sign compare warnings"Christian König1-1/+1
2017-01-03st/va: error handlingNayan Deshmukh1-3/+15
2017-01-03st/vdpau: error handlingNayan Deshmukh3-15/+50
2017-01-03vl/compositor: implement error handlingNayan Deshmukh2-3/+12
2017-01-03i965/vec4: enable ARB_gpu_shader_fp64 for HaswellIago Toral Quiroga1-0/+3
2017-01-03i965/vec4: adjust spilling costs for 64-bit registers.Iago Toral Quiroga1-2/+13
2017-01-03i965/vec4: prevent spilling of DOUBLE_TO_SINGLE destinationIago Toral Quiroga1-0/+12
2017-01-03i965/vec4: avoid spilling of registers that mix 32-bit and 64-bit accessIago Toral Quiroga1-0/+24
2017-01-03i965/vec4: support basic spilling of 64-bit registersIago Toral Quiroga1-6/+28
2017-01-03i965/vec4: run scalarize_df() after spillingIago Toral Quiroga1-0/+18
2017-01-03i965/vec4: prevent src/dst hazards during 64-bit register allocationIago Toral Quiroga1-1/+7
2017-01-03i965/vec4/scalarize_df: support more swizzles via vstride=0Iago Toral Quiroga3-21/+51
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