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authorEric Anholt <eric@anholt.net>2011-05-09 09:56:18 -0700
committerEric Anholt <eric@anholt.net>2011-08-10 11:03:48 -0700
commitb1f0bffd399f377a19b0541e1d834afad8b9dad0 (patch)
tree283ec5a042ed36a61f5e7e0dc1cb783f73924a12 /src/mesa/drivers/dri/i965/brw_context.h
parent4e10d5825b31d2c58c0af3e29b7fc2eacb2b4709 (diff)
i965/fs: Factor out the register allocator setup to a separate function.
Besides separating out a logical step of the giant register allocator function, this now communicates a bunch of the allocator information through entries in brw_context, which will make this code partially reusable for caching the expensive allocator setup.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 22baf978ad..cc11d06874 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -748,6 +748,29 @@ struct brw_context
* Pre-gen6, push constants live in the CURBE.
*/
uint32_t push_const_offset;
+
+ /** @{ register allocator */
+
+ struct ra_regs *regs;
+
+ /** Array of the ra classes for the unaligned contiguous
+ * register block sizes used.
+ */
+ int *classes;
+
+ /**
+ * Mapping for register-allocated objects in *regs to the first
+ * GRF for that object.
+ */
+ uint8_t *ra_reg_to_grf;
+
+ /**
+ * ra class for the aligned pairs we use for PLN, which doesn't
+ * appear in *classes.
+ */
+ int aligned_pairs_class;
+
+ /** @} */
} wm;