diff options
| author | Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> | 2019-10-03 13:49:30 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-17 16:29:10 -0400 |
| commit | 92a5dc22051b3b1054bc696f45142a77c779abeb (patch) | |
| tree | 266fb8815bc183b36f631dba10e57188dc3397aa | |
| parent | 652651ffee49f11654d94c220babb1866dde2efb (diff) | |
drm/amd/display: change PP_SM defs to 8
DPM level is 8 these were incorrect before. Fix them
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h index ef7df9ef6d7e..b01db61b6181 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h +++ b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h @@ -251,8 +251,8 @@ struct pp_smu_funcs_nv { #define PP_SMU_NUM_SOCCLK_DPM_LEVELS 8 #define PP_SMU_NUM_DCFCLK_DPM_LEVELS 8 -#define PP_SMU_NUM_FCLK_DPM_LEVELS 4 -#define PP_SMU_NUM_MEMCLK_DPM_LEVELS 4 +#define PP_SMU_NUM_FCLK_DPM_LEVELS 8 +#define PP_SMU_NUM_MEMCLK_DPM_LEVELS 8 struct dpm_clock { uint32_t Freq; // In MHz |