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path: root/src/intel.h
AgeCommit message (Expand)AuthorFilesLines
2011-12-18Silence uxa-only compilationChris Wilson1-2/+0
2011-12-17uxa: Explicitly check for libdrm_intel in configureChris Wilson1-1/+0
2011-12-13uxa: Wakeup 3s after the last rendering to reap the bo-cacheChris Wilson1-0/+1
2011-12-02uxa: Reset size limits based on AGP sizeChris Wilson1-1/+0
2011-11-17glamor: Initial commit to introduce glamor acceleration.Zhigang Gong1-0/+1
2011-11-16Compile out UXA if so desiredChris Wilson1-2/+1
2011-11-16sna: Reduce and clarify dependenciesChris Wilson1-2/+1
2011-11-03uxa: Remove caching of surface binding locationChris Wilson1-1/+0
2011-10-12Remove vestigial includes from DRI1Chris Wilson1-2/+0
2011-10-11snb: implement PIPE_CONTROL workaroundDaniel Vetter1-0/+1
2011-08-29video: check that the pixmap exists before useChris Wilson1-0/+6
2011-07-28render: Refactor to use newly shared pipeline setup code in i965_3d.c.Kenneth Graunke1-4/+6
2011-07-28Xv: Refactor out pipeline setup functions for future reuse in render.Kenneth Graunke1-0/+29
2011-07-11dri: Enable triple-bufferred pageflipsChris Wilson1-1/+10
2011-07-11dri: Prevent abuse of the Resource databaseChris Wilson1-1/+2
2011-04-08intel: Restore manual flush for old kernelsChris Wilson1-0/+2
2011-04-07Revert "i965: Convert to relative relocations for state"Chris Wilson1-2/+15
2011-04-07i965: Avoid transform overheads for vertex emit where possibleChris Wilson1-1/+1
2011-04-04i965: Reset vertex_id after every batchChris Wilson1-2/+0
2011-04-04Take advantage of the kernel flush for dirty bo in the busy ioctlChris Wilson1-2/+0
2011-04-04Remove unused function 'intel_bo_alloc_for_data'Chris Wilson1-16/+0
2011-04-04i965: segregate each vertex element into its own bufferChris Wilson1-0/+1
2011-04-04i965: Convert to relative relocations for stateChris Wilson1-2/+2
2011-03-30Add a DRI2SwapEventPtr typedef for retro xserversChris Wilson1-0/+5
2011-03-23Handle drawable/client destruction in pending swaps/flipsKeith Packard1-0/+1
2011-03-23dri2: Make DRI2FrameEvent public and use instead of void *Keith Packard1-3/+22
2011-03-09Give each user of tiling separate xorg.conf optionsChris Wilson1-1/+6
2011-01-20Create the UXA generational resources during screen createChris Wilson1-1/+1
2011-01-08Delete unused memory allocation flags.Chris Wilson1-5/+0
2011-01-08Cache the fixed crtc<->pipe relationshipChris Wilson1-5/+1
2011-01-08Remove unused I830OutputChris Wilson1-2/+0
2011-01-08Remove bitrotted, but fortunately unused, I830CrtcPrivateChris Wilson1-18/+0
2011-01-08Remove unused GTT/Map sizes and addressesChris Wilson1-8/+0
2011-01-08Remove unused struct _intel_memory definitionChris Wilson1-17/+0
2010-12-30Don't replace the scanout bo through PutImageChris Wilson1-0/+1
2010-12-23i830: amalgamate consecutive composites into a single primitiveChris Wilson1-1/+2
2010-12-16Fix reporting of pageflip completion events on multi-head.Mario Kleiner1-1/+1
2010-12-06snb: Cache pixmap binding locationsChris Wilson1-0/+1
2010-12-06snb: Cache state between composite opsChris Wilson1-0/+10
2010-12-03Wait on the current buffer to complete when running synchronously.Chris Wilson1-1/+0
2010-12-03i965: Amalgamate surface binding tablesChris Wilson1-5/+16
2010-12-03i965: Upload an entire vbo in a single pwrite, rather than per-rectangleChris Wilson1-3/+5
2010-11-23Disable BLT for i830 and 845GChris Wilson1-0/+1
2010-11-01add BLT ring supportZou Nan hai1-0/+4
2010-11-01Xv: setup pipeline for Xv on SandybridgeXiang, Haihao1-0/+4
2010-10-29uxa: Enable reduced fence sizes for i915Chris Wilson1-0/+1
2010-10-22intel: Listen for hotplug uevents (V3)Adam Jackson1-0/+12
2010-10-13Move EDID_COMPLETE_RAWDATA define to intel.h to avoid redifinition warningChris Wilson1-0/+5
2010-10-06uxa: Re-enable acceleration.Chris Wilson1-0/+1
2010-10-04Split shadow handling routines to their own file.Chris Wilson1-0/+4
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