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authorChris Wilson <chris@chris-wilson.co.uk>2011-06-04 18:11:54 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2011-06-04 19:36:09 +0100
commitfcbe2d9ee79c936cad3ee86836286dcb280f0047 (patch)
tree6949005579fcc826f73ebcd7f0a7b0e45f0f4837
parentbcef98af561939aa48d9236b2dfa2c5626adf4cb (diff)
sna/gen4: Flush every vertex for the magic CA pass
gen4 dies hard if it has two rectangles in the pipeline, and despite the stringent and crippling efforts to prevent us from efficiently using the GPU, I missed a flush before submitting the CA rectangle. Reported-and-tested-by: Fryderyk Dziarmagowski <fdziarmagowski@gmail.com> References: https://bugs.freedesktop.org/show_bug.cgi?id=28768 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--src/sna/gen4_render.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index 82fef2d6..3399919d 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -56,11 +56,16 @@
* the BLT engine.
*/
#define PREFER_BLT 1
+#define FLUSH_EVERY_VERTEX 1
+#if FLUSH_EVERY_VERTEX
#define FLUSH() do { \
gen4_vertex_flush(sna); \
OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); \
} while (0)
+#else
+#define FLUSH()
+#endif
#define GEN4_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
@@ -309,6 +314,9 @@ static void gen4_magic_ca_pass(struct sna *sna,
DBG(("%s: CA fixup\n", __FUNCTION__));
+ if (FLUSH_EVERY_VERTEX)
+ OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH);
+
gen4_emit_pipelined_pointers
(sna, op, PictOpAdd,
gen4_choose_composite_kernel(PictOpAdd,