diff options
authorChris Wilson <>2017-08-22 20:20:23 +0100
committerChris Wilson <>2017-08-22 20:29:20 +0100
commitc89905754b929f0421db7ea6d60b8942ccdbd8af (patch)
parent7534e96ffbe208ec2aa41b1b5848d05749b48797 (diff)
sna/gen8+: Discard any blt using a LINEAR buffer that is not 64byte aligned
The bug we discovered back in commit 3a22b6f6d55a5b1e0a1c0a3d597996268ed439ad Author: Mika Kuoppala <> Date: Wed Nov 19 15:10:05 2014 +0200 sna: gen8 BLT broken when address has bit 4 set turns out to be even wider than our initial finding. It is now recommended that you avoid using the BLT on LINEAR addresses that are not cache-line aligned (64 bytes). You can convert the offset into a coordinate offset (provided the address is at least pixel aligned), but that remains quite hairy to fit into the current code base. So keep saying no to misaligned blits (we either use the 3D engine instead, which may end up thrashing the TLBs given the LINEAR layout, or we just use the CPU). The impact of issuing misaligned blits is that the blitter ends up performing the blit presuming the aligned address, causing it to end up offset (and vary per line). Reported-by: Lyude Paul <> Signed-off-by: Chris Wilson <>
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sna/kgem.h b/src/sna/kgem.h
index 08b4eb20..b0c38dae 100644
--- a/src/sna/kgem.h
+++ b/src/sna/kgem.h
@@ -587,7 +587,7 @@ static inline bool kgem_bo_can_blt(struct kgem *kgem,
return false;
- if (kgem->gen >= 0100 && bo->proxy && bo->delta & (1 << 4)) {
+ if (kgem->gen >= 0100 && bo->proxy && bo->delta & 63) {
DBG(("%s: can not blt to handle=%d, delta=%d\n",
__FUNCTION__, bo->handle, bo->delta));
return false;