Take advantage of the kernel flush for dirty bo in the busy ioctl

Rather than just creating and submitting a batch that simply contains a
flush in order to periodically ensure that rendering reaches the
scanout, we can simply ask the kernel whether the scanout is busy. The
kernel will then submit a flush on our behalf if it is dirty, which
takes advantage of the kernel's dirty state tracking.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

8 files changed, 27 insertions, 31 deletions

diff --git a/src/i965_render.c b/src/i965_render.c
index e504bfe6..8802e7e5 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -1592,7 +1592,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
 		2 + (mask ? 2 : 1) * (composite_op->is_affine ? 2: 3);
 
 	if (!i965_composite_check_aperture(intel)) {
-		intel_batch_submit(scrn, FALSE);
+		intel_batch_submit(scrn);
 		if (!i965_composite_check_aperture(intel)) {
 			intel_debug_fallback(scrn,
 					     "Couldn't fit render operation "
@@ -1756,7 +1756,7 @@ i965_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY,
 	}
 
 	if (!i965_composite_check_aperture(intel))
-		intel_batch_submit(scrn, FALSE);
+		intel_batch_submit(scrn);
 
 	intel_batch_start_atomic(scrn, 200);
 	if (intel->needs_render_state_emit) {
diff --git a/src/i965_video.c b/src/i965_video.c
index 38c81003..c7576815 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -1207,7 +1207,7 @@ I965DisplayVideoTextured(ScrnInfoPtr scrn,
 		if (drm_intel_bufmgr_check_aperture_space(bo_table,
 							  ARRAY_SIZE(bo_table))
 		    < 0) {
-			intel_batch_submit(scrn, FALSE);
+			intel_batch_submit(scrn);
 		}
 
 		intel_batch_start_atomic(scrn, 100);
@@ -1850,7 +1850,7 @@ void Gen6DisplayVideoTextured(ScrnInfoPtr scrn,
 		 * Assume that it does after being flushed.
 		 */
 		if (drm_intel_bufmgr_check_aperture_space(bo_table, ARRAY_SIZE(bo_table)) < 0)
-			intel_batch_submit(scrn, FALSE);
+			intel_batch_submit(scrn);
 
 		intel_batch_start_atomic(scrn, 200);
 		gen6_emit_video_setup(scrn, surface_state_binding_table_bo, n_src_surf, pixmap);
diff --git a/src/intel.h b/src/intel.h
index 49cba1ad..e75dc9de 100644
--- a/src/intel.h
+++ b/src/intel.h
@@ -295,8 +295,6 @@ typedef struct intel_screen_private {
 
 	Bool shadow_present;
 
-	Bool need_mi_flush;
-
 	unsigned int tiling;
 #define INTEL_TILING_FB		0x1
 #define INTEL_TILING_2D		0x2
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index 2bc00f90..2e1b7d96 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -135,8 +135,6 @@ void intel_batch_do_flush(ScrnInfoPtr scrn)
 
 	while (!list_is_empty(&intel->flush_pixmaps))
 		list_del(intel->flush_pixmaps.next);
-
-	intel->need_mi_flush = FALSE;
 }
 
 void intel_batch_emit_flush(ScrnInfoPtr scrn)
@@ -176,7 +174,7 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn)
 	intel_batch_do_flush(scrn);
 }
 
-void intel_batch_submit(ScrnInfoPtr scrn, int flush)
+void intel_batch_submit(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	int ret;
@@ -190,9 +188,6 @@ void intel_batch_submit(ScrnInfoPtr scrn, int flush)
 	if (intel->batch_flush)
 		intel->batch_flush(intel);
 
-	if (flush)
-		intel_batch_emit_flush(scrn);
-
 	if (intel->batch_used == 0)
 		return;
 
@@ -249,7 +244,6 @@ void intel_batch_submit(ScrnInfoPtr scrn, int flush)
 		list_del(&entry->batch);
 	}
 
-	intel->need_mi_flush |= !list_is_empty(&intel->flush_pixmaps);
 	while (!list_is_empty(&intel->flush_pixmaps))
 		list_del(intel->flush_pixmaps.next);
 
@@ -285,5 +279,5 @@ void intel_debug_flush(ScrnInfoPtr scrn)
 		intel_batch_emit_flush(scrn);
 
 	if (intel->debug_flush & DEBUG_FLUSH_BATCHES)
-		intel_batch_submit(scrn, FALSE);
+		intel_batch_submit(scrn);
 }
diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h
index 0d6c3f72..605932a4 100644
--- a/src/intel_batchbuffer.h
+++ b/src/intel_batchbuffer.h
@@ -37,7 +37,7 @@ void intel_batch_init(ScrnInfoPtr scrn);
 void intel_batch_teardown(ScrnInfoPtr scrn);
 void intel_batch_emit_flush(ScrnInfoPtr scrn);
 void intel_batch_do_flush(ScrnInfoPtr scrn);
-void intel_batch_submit(ScrnInfoPtr scrn, int flush);
+void intel_batch_submit(ScrnInfoPtr scrn);
 
 static inline int intel_batch_space(intel_screen_private *intel)
 {
@@ -54,7 +54,7 @@ intel_batch_require_space(ScrnInfoPtr scrn, intel_screen_private *intel, unsigne
 {
 	assert(sz < intel->batch_bo->size - 8);
 	if (intel_batch_space(intel) < sz)
-		intel_batch_submit(scrn, FALSE);
+		intel_batch_submit(scrn);
 }
 
 static inline void intel_batch_start_atomic(ScrnInfoPtr scrn, unsigned int sz)
diff --git a/src/intel_display.c b/src/intel_display.c
index 47348446..b6592c44 100644
--- a/src/intel_display.c
+++ b/src/intel_display.c
@@ -451,7 +451,7 @@ intel_crtc_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
 	crtc->y = y;
 	crtc->rotation = rotation;
 
-	intel_batch_submit(crtc->scrn, TRUE);
+	intel_batch_submit(crtc->scrn);
 
 	mode_to_kmode(crtc->scrn, &intel_crtc->kmode, mode);
 	ret = intel_crtc_apply(crtc);
@@ -1363,7 +1363,7 @@ intel_xf86crtc_resize(ScrnInfoPtr scrn, int width, int height)
 	if (scrn->virtualX == width && scrn->virtualY == height)
 		return TRUE;
 
-	intel_batch_submit(scrn, TRUE);
+	intel_batch_submit(scrn);
 
 	old_width = scrn->virtualX;
 	old_height = scrn->virtualY;
diff --git a/src/intel_driver.c b/src/intel_driver.c
index 84497185..9e018367 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -758,7 +758,7 @@ intel_flush_callback(CallbackListPtr *list,
 {
 	ScrnInfoPtr scrn = user_data;
 	if (scrn->vtSema)
-		intel_batch_submit(scrn, FALSE);
+		intel_batch_submit(scrn);
 }
 
 #if HAVE_UDEV
diff --git a/src/intel_uxa.c b/src/intel_uxa.c
index 662bcc7e..24ef6fae 100644
--- a/src/intel_uxa.c
+++ b/src/intel_uxa.c
@@ -88,7 +88,7 @@ static void
 gen6_context_switch(intel_screen_private *intel,
 		    int new_mode)
 {
-	intel_batch_submit(intel->scrn, FALSE);
+	intel_batch_submit(intel->scrn);
 }
 
 static void
@@ -136,7 +136,7 @@ intel_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
 
 	bo_table[0] = intel->batch_bo;
 	if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) != 0) {
-		intel_batch_submit(scrn, FALSE);
+		intel_batch_submit(scrn);
 		bo_table[0] = intel->batch_bo;
 		if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) !=
 		    0) {
@@ -703,7 +703,7 @@ static Bool intel_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
 
 	if (!list_is_empty(&priv->batch) &&
 	    (access == UXA_ACCESS_RW || priv->batch_write))
-		intel_batch_submit(scrn, FALSE);
+		intel_batch_submit(scrn);
 
 	if (priv->tiling || bo->size <= intel->max_gtt_map_size)
 		ret = drm_intel_gem_bo_map_gtt(bo);
@@ -921,7 +921,7 @@ static Bool intel_uxa_get_image(PixmapPtr pixmap,
 
 		FreeScratchGC(gc);
 
-		intel_batch_submit(xf86Screens[screen->myNum], FALSE);
+		intel_batch_submit(xf86Screens[screen->myNum]);
 
 		x = y = 0;
 		pixmap = scratch;
@@ -935,20 +935,24 @@ static Bool intel_uxa_get_image(PixmapPtr pixmap,
 	return ret;
 }
 
+static void intel_flush_rendering(intel_screen_private *intel)
+{
+    drm_intel_bo_busy(intel->front_buffer);
+}
+
 void intel_uxa_block_handler(intel_screen_private *intel)
 {
 	if (intel->shadow_damage &&
 	    pixman_region_not_empty(DamageRegion(intel->shadow_damage))) {
 		intel_shadow_blt(intel);
-		/* Emit a flush of the rendering cache, or on the 965
-		 * and beyond rendering results may not hit the
-		 * framebuffer until significantly later.
-		 */
-		intel_batch_submit(intel->scrn, TRUE);
-
 		DamageEmpty(intel->shadow_damage);
-	} else
-		intel_batch_submit(intel->scrn, TRUE);
+	}
+
+	/* Emit a flush of the rendering cache, or on the 965
+	 * and beyond rendering results may not hit the
+	 * framebuffer until significantly later.
+	 */
+	intel_flush_rendering(intel);
 }
 
 static PixmapPtr