R6xx/R7xx: clean up bool const code

3 regs: 1 bit per bool, 32 bools per ps/vs/gs

6 files changed, 26 insertions, 13 deletions

diff --git a/src/r600_exa.c b/src/r600_exa.c
index 3faa7870..4f486ed0 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -1486,9 +1486,9 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
 
     /* VS bool constant */
     if (pMask)
-	set_bool_const(pScrn, accel_state->ib, 1, 1);
+	set_bool_consts(pScrn, accel_state->ib, SQ_BOOL_CONST_vs, (1 << 0));
     else
-	set_bool_const(pScrn, accel_state->ib, 1, 0);
+	set_bool_consts(pScrn, accel_state->ib, SQ_BOOL_CONST_vs, (0 << 0));
 
     accel_state->vs_mc_addr = info->fbLocation + pScrn->fbOffset + accel_state->shaders->offset +
 	accel_state->comp_vs_offset;
diff --git a/src/r600_reg.h b/src/r600_reg.h
index 9036e2a5..937926ba 100644
--- a/src/r600_reg.h
+++ b/src/r600_reg.h
@@ -51,8 +51,8 @@ enum {
     SET_LOOP_CONST_offset          = 0x0003e200,
     SET_LOOP_CONST_end             = 0x0003e380,
     SET_BOOL_CONST_offset          = 0x0003e380,
-    SET_BOOL_CONST_end             = 0x00040000,
-} ;
+    SET_BOOL_CONST_end             = 0x0003e38c,
+};
 
 /* packet3 IT_SURFACE_BASE_UPDATE bits */
 enum {
diff --git a/src/r600_reg_r6xx.h b/src/r600_reg_r6xx.h
index 2e7dfa94..b4cc639a 100644
--- a/src/r600_reg_r6xx.h
+++ b/src/r600_reg_r6xx.h
@@ -488,7 +488,16 @@ enum {
     SQ_LOOP_CONST_ps                                      = 0,
     SQ_LOOP_CONST_vs                                      = SQ_LOOP_CONST_ps + SQ_LOOP_CONST_ps_num,
     SQ_LOOP_CONST_gs                                      = SQ_LOOP_CONST_vs + SQ_LOOP_CONST_vs_num,
-} ;
+    SQ_BOOL_CONST                                         = SQ_BOOL_CONST_0,	   /* 32 bits per PS, VS, GS */
+    SQ_BOOL_CONST_ps_num                                  = 1,
+    SQ_BOOL_CONST_vs_num                                  = 1,
+    SQ_BOOL_CONST_gs_num                                  = 1,
+    SQ_BOOL_CONST_all_num                                 = 3,
+    SQ_BOOL_CONST_offset                                  = 4,
+    SQ_BOOL_CONST_ps                                      = 0,
+    SQ_BOOL_CONST_vs                                      = SQ_BOOL_CONST_ps + SQ_BOOL_CONST_ps_num,
+    SQ_BOOL_CONST_gs                                      = SQ_BOOL_CONST_vs + SQ_BOOL_CONST_vs_num,
+};
 
 
 #endif
diff --git a/src/r600_state.h b/src/r600_state.h
index c903ded7..181e1678 100644
--- a/src/r600_state.h
+++ b/src/r600_state.h
@@ -255,7 +255,7 @@ ps_setup(ScrnInfoPtr pScrn, drmBufPtr ib, shader_config_t *ps_conf);
 void
 set_alu_consts(ScrnInfoPtr pScrn, drmBufPtr ib, int offset, int count, float *const_buf);
 void
-set_bool_const(ScrnInfoPtr pScrn, drmBufPtr ib, int offset, uint32_t val);
+set_bool_consts(ScrnInfoPtr pScrn, drmBufPtr ib, int offset, uint32_t val);
 void
 set_vtx_resource(ScrnInfoPtr pScrn, drmBufPtr ib, vtx_resource_t *res);
 void
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index 735231b5..3dfe151a 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -172,12 +172,12 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
     switch(pPriv->id) {
     case FOURCC_YV12:
     case FOURCC_I420:
-	set_bool_const(pScrn, accel_state->ib, 0, 1);
+	set_bool_consts(pScrn, accel_state->ib, SQ_BOOL_CONST_ps, (1 << 0));
 	break;
     case FOURCC_UYVY:
     case FOURCC_YUY2:
     default:
-	set_bool_const(pScrn, accel_state->ib, 0, 0);
+	set_bool_consts(pScrn, accel_state->ib, SQ_BOOL_CONST_ps, (0 << 0));
 	break;
     }
 
diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c
index f93ca013..bce597b1 100644
--- a/src/r6xx_accel.c
+++ b/src/r6xx_accel.c
@@ -153,8 +153,10 @@ reset_bool_loop_const(ScrnInfoPtr pScrn, drmBufPtr ib)
 {
     int i;
 
-    for (i = 0; i < SQ_BOOL_CONST_0_num; i++)
-	EREG(ib, SQ_BOOL_CONST_0 + (i << 2), 0);
+
+    PACK0(ib, SQ_BOOL_CONST, SQ_BOOL_CONST_all_num);
+    for (i = 0; i < SQ_BOOL_CONST_all_num; i++)
+	E32(ib, 0);
 
     PACK0(ib, SQ_LOOP_CONST, SQ_LOOP_CONST_all_num);
 
@@ -430,10 +432,12 @@ set_alu_consts(ScrnInfoPtr pScrn, drmBufPtr ib, int offset, int count, float *co
 }
 
 void
-set_bool_const(ScrnInfoPtr pScrn, drmBufPtr ib, int offset, uint32_t val)
+set_bool_consts(ScrnInfoPtr pScrn, drmBufPtr ib, int offset, uint32_t val)
 {
-    /* bool order is: ps, vs, gs, ps, vs, gs, ... */
-    EREG(ib, SQ_BOOL_CONST_0 + (offset << 2), val);
+    /* bool register order is: ps, vs, gs; one register each
+     * 1 bits per bool; 32 bools each for ps, vs, gs.
+     */
+    EREG(ib, SQ_BOOL_CONST + offset * SQ_BOOL_CONST_offset, val);
 }
 
 void