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authorAlex Deucher <alexdeucher@gmail.com>2010-11-22 13:10:16 -0500
committerAlex Deucher <alexdeucher@gmail.com>2010-11-22 18:06:04 -0500
commit61c97b0812c820564c7bc9d64a998c109bcd46b3 (patch)
tree588c969969a01b8bf0969eed09acef66c15d61de
parent0659f35dfbeda7dd3ff58da1deb6484fabadc332 (diff)
Add EXA/Xv acceleration support for Ontario Fusion APUs
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
-rw-r--r--src/evergreen_accel.c27
-rw-r--r--src/radeon_kms.c1
2 files changed, 25 insertions, 3 deletions
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index 92d7fa10..f3691d76 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -69,7 +69,8 @@ evergreen_sq_setup(ScrnInfoPtr pScrn, sq_config_t *sq_conf)
uint32_t sq_stack_resource_mgmt_1, sq_stack_resource_mgmt_2, sq_stack_resource_mgmt_3;
RADEONInfoPtr info = RADEONPTR(pScrn);
- if (info->ChipFamily == CHIP_FAMILY_CEDAR)
+ if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
+ (info->ChipFamily == CHIP_FAMILY_PALM))
sq_config = 0;
else
sq_config = VC_ENABLE_bit;
@@ -497,7 +498,8 @@ evergreen_set_vtx_resource(ScrnInfoPtr pScrn, vtx_resource_t *res, uint32_t doma
sq_vtx_constant_word4 = 0;
/* flush vertex cache */
- if (info->ChipFamily == CHIP_FAMILY_CEDAR)
+ if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
+ (info->ChipFamily == CHIP_FAMILY_PALM))
evergreen_cp_set_surface_sync(pScrn, TC_ACTION_ENA_bit,
accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
res->bo,
@@ -834,6 +836,27 @@ evergreen_set_default_state(ScrnInfoPtr pScrn)
sq_conf.num_hs_stack_entries = 85;
sq_conf.num_ls_stack_entries = 85;
break;
+ case CHIP_FAMILY_PALM:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 96;
+ sq_conf.num_vs_threads = 16;
+ sq_conf.num_gs_threads = 16;
+ sq_conf.num_es_threads = 16;
+ sq_conf.num_hs_threads = 16;
+ sq_conf.num_ls_threads = 16;
+ sq_conf.num_ps_stack_entries = 42;
+ sq_conf.num_vs_stack_entries = 42;
+ sq_conf.num_gs_stack_entries = 42;
+ sq_conf.num_es_stack_entries = 42;
+ sq_conf.num_hs_stack_entries = 42;
+ sq_conf.num_ls_stack_entries = 42;
+ break;
}
evergreen_sq_setup(pScrn, &sq_conf);
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 76460602..0cd419f2 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -263,7 +263,6 @@ static Bool RADEONPreInitAccel_KMS(ScrnInfoPtr pScrn)
}
if (xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE) ||
- (info->ChipFamily >= CHIP_FAMILY_PALM) ||
(!RADEONIsAccelWorking(pScrn))) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"GPU accel disabled or not working, using shadowfb for KMS\n");