diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2009-11-30 11:05:38 -0500 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2009-11-30 11:06:37 -0500 |
| commit | 4d90dc3cb248e9d61c0c490bba80f6727fafd318 (patch) | |
| tree | 31eb8fb43772f3bfaab9fa6376293040f03fc8a6 | |
| parent | a8dbf7c23481501987971a9c0b6cb0760f86127f (diff) | |
atom: pull misc mode info for lvds panel mode from bios tables
sync polarity, etc. This will likely fix LVDS problems
on some laptops.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
| -rw-r--r-- | src/radeon_atombios.c | 23 | ||||
| -rw-r--r-- | src/radeon_modes.c | 2 |
2 files changed, 24 insertions, 1 deletions
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c index 74606b3b..462c5ef8 100644 --- a/src/radeon_atombios.c +++ b/src/radeon_atombios.c @@ -1980,6 +1980,7 @@ RADEONGetATOMLVDSInfo(ScrnInfoPtr pScrn, radeon_lvds_ptr lvds) radeon_native_mode_ptr native_mode = &lvds->native_mode; atomDataTablesPtr atomDataPtr; uint8_t crev, frev; + uint16_t misc; atomDataPtr = info->atomBIOS->atomDataPtr; @@ -2000,6 +2001,17 @@ RADEONGetATOMLVDSInfo(ScrnInfoPtr pScrn, radeon_lvds_ptr lvds) native_mode->VBlank = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.usVBlanking_Time); native_mode->VOverPlus = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.usVSyncOffset); native_mode->VSyncWidth = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.usVSyncWidth); + misc = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->sLCDTiming.susModeMiscInfo.usAccess); + if (misc & ATOM_VSYNC_POLARITY) + native_mode->Flags |= V_NVSYNC; + if (misc & ATOM_HSYNC_POLARITY) + native_mode->Flags |= V_NHSYNC; + if (misc & ATOM_COMPOSITESYNC) + native_mode->Flags |= V_CSYNC; + if (misc & ATOM_INTERLACE) + native_mode->Flags |= V_INTERLACE; + if (misc & ATOM_DOUBLE_CLOCK_MODE) + native_mode->Flags |= V_DBLSCAN; lvds->PanelPwrDly = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info->usOffDelayInMs); lvds->lvds_misc = atomDataPtr->LVDS_Info.LVDS_Info->ucLVDS_Misc; lvds->lvds_ss_id = atomDataPtr->LVDS_Info.LVDS_Info->ucSS_Id; @@ -2014,6 +2026,17 @@ RADEONGetATOMLVDSInfo(ScrnInfoPtr pScrn, radeon_lvds_ptr lvds) native_mode->VBlank = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.usVBlanking_Time); native_mode->VOverPlus = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.usVSyncOffset); native_mode->VSyncWidth = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.usVSyncWidth); + misc = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->sLCDTiming.susModeMiscInfo.usAccess); + if (misc & ATOM_VSYNC_POLARITY) + native_mode->Flags |= V_NVSYNC; + if (misc & ATOM_HSYNC_POLARITY) + native_mode->Flags |= V_NHSYNC; + if (misc & ATOM_COMPOSITESYNC) + native_mode->Flags |= V_CSYNC; + if (misc & ATOM_INTERLACE) + native_mode->Flags |= V_INTERLACE; + if (misc & ATOM_DOUBLE_CLOCK_MODE) + native_mode->Flags |= V_DBLSCAN; lvds->PanelPwrDly = le16_to_cpu(atomDataPtr->LVDS_Info.LVDS_Info_v12->usOffDelayInMs); lvds->lvds_misc = atomDataPtr->LVDS_Info.LVDS_Info_v12->ucLVDS_Misc; lvds->lvds_ss_id = atomDataPtr->LVDS_Info.LVDS_Info_v12->ucSS_Id; diff --git a/src/radeon_modes.c b/src/radeon_modes.c index ec60cc9b..3e3d4c80 100644 --- a/src/radeon_modes.c +++ b/src/radeon_modes.c @@ -158,7 +158,7 @@ static DisplayModePtr RADEONFPNativeMode(xf86OutputPtr output) new->VSyncEnd = new->VSyncStart + native_mode->VSyncWidth; new->Clock = native_mode->DotClock; - new->Flags = 0; + new->Flags = native_mode->Flags; if (new) { new->type = M_T_DRIVER | M_T_PREFERRED; |