diff options
| author | Eric Anholt <eric@anholt.net> | 2009-05-19 16:26:35 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2009-05-19 16:26:35 -0700 |
| commit | 652d5518d6901f4ebe0f696b8d7e18b8edfc76ec (patch) | |
| tree | 132e9caca74f53d0db6652ad705a3a99f5272fb9 | |
| parent | b7d70fc1fdb8b1b29ce62a6d75c2aca2b5314b7e (diff) | |
Add decode of gen4 PIPE_CONTROL
| -rw-r--r-- | tools/intel_gpu_dump.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/tools/intel_gpu_dump.c b/tools/intel_gpu_dump.c index 921a07511..205cf4898 100644 --- a/tools/intel_gpu_dump.c +++ b/tools/intel_gpu_dump.c @@ -1426,6 +1426,7 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures) { unsigned int opcode, len; int i; + char *desc1 = NULL; struct { uint32_t opcode; @@ -1633,6 +1634,31 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures) return len; + case 0x7a00: + len = (data[0] & 0xff) + 2; + if (len != 4) + fprintf(out, "Bad count in PIPE_CONTROL\n"); + if (count < len) + BUFFER_FAIL(count, len, "PIPE_CONTROL"); + + switch ((data[0] >> 14) & 0x3) { + case 0: desc1 = "no write"; break; + case 1: desc1 = "qword write"; break; + case 2: desc1 = "PS_DEPTH_COUNT write"; break; + case 3: desc1 = "TIMESTAMP write"; break; + } + instr_out(data, hw_offset, 0, + "PIPE_CONTROL: %s, %sdepth stall, %sRC write flush, " + "%sinst flush\n", + desc1, + data[0] & (1 << 13) ? "" : "no ", + data[0] & (1 << 12) ? "" : "no ", + data[0] & (1 << 11) ? "" : "no "); + instr_out(data, hw_offset, 1, "destination address\n"); + instr_out(data, hw_offset, 2, "immediate dword low\n"); + instr_out(data, hw_offset, 3, "immediate dword high\n"); + return len; + case 0x7b00: len = (data[0] & 0xff) + 2; if (len != 6) |