diff options
author | Homer Hsing <homer.xing@intel.com> | 2012-09-20 13:09:15 +0800 |
---|---|---|
committer | Xiang, Haihao <haihao.xiang@intel.com> | 2012-09-26 23:27:00 -0400 |
commit | 4d8bc5d8551b16e0ac7fd8e5b47aac4c33e424fc (patch) | |
tree | d03b53f72a3fa7d37a47e0c66f606162a2684c2f | |
parent | 0f6943ed72116201edb2f51f760784a92a9be2ed (diff) |
Fix field length of JIP for one-offset-branch in Gen6
Such JIP has 25 bits length in Gen6.
-rw-r--r-- | src/brw_structs.h | 5 | ||||
-rw-r--r-- | src/main.c | 6 |
2 files changed, 7 insertions, 4 deletions
diff --git a/src/brw_structs.h b/src/brw_structs.h index 9a0c805..b60f8b7 100644 --- a/src/brw_structs.h +++ b/src/brw_structs.h @@ -1311,7 +1311,10 @@ struct brw_instruction { GLint JIP:16; /* bspec: both the JIP and UIP are signed 16-bit numbers */ GLint UIP:16; - } branch; /* for branch instructions: brc, brd, if, else, endif, while, break, cont, call, ret, halt, ... */ + } branch_2_offset; /* for Gen6, Gen7 2-offsets branch instructions */ + + GLint JIP; /* for Gen6, Gen7 1-offset branch instructions + Gen6 uses low 25 bits. Gen7 uses low 16 bits. */ struct { GLuint function:4; @@ -351,12 +351,12 @@ int main(int argc, char **argv) entry1->inst_offset - entry->inst_offset; int delta = (entry->instruction.header.opcode == BRW_OPCODE_JMPI ? 1 : 0); if (gen_level >= 5) - entry->instruction.bits3.branch.JIP = 2 * (offset - delta); // bspec: the jump distance in number of eight-byte units + entry->instruction.bits3.JIP = 2 * (offset - delta); // bspec: the jump distance in number of eight-byte units else - entry->instruction.bits3.branch.JIP = offset - delta; + entry->instruction.bits3.JIP = offset - delta; if (entry->instruction.header.opcode == BRW_OPCODE_ELSE) - entry->instruction.bits3.branch.UIP = 1; + entry->instruction.bits3.branch_2_offset.UIP = 1; found = 1; break; } |