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| author | Kevin Brace <kevinbrace@gmx.com> | 2016-02-08 21:26:02 -0800 |
|---|---|---|
| committer | Kevin Brace <kevinbrace@gmx.com> | 2016-02-08 21:26:02 -0800 |
| commit | e7be60ee371affe2e91ba8e8b2ea931e311ad26c (patch) | |
| tree | 1a41362e9a3ec99c4a265b631aba233e1562c2c2 /README | |
| parent | 35c6f0c1410247c4eba5fbc2e017561778c3c90d (diff) | |
Preserving PCI Burst Write Wait State Select Bit
The code was previously setting PCI Burst Write Wait State Select bit
(0x3c5.0x1a[2]) to 1 for no good reasons. Typically, the option to enable
1 wait state PCI transaction in many VIA Technologies chipset-based
computers is provided in the BIOS setup, therefore, it is prudent for the
graphics device driver not to alter this bit.
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
Diffstat (limited to 'README')
0 files changed, 0 insertions, 0 deletions