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authorStuart Bennett <sb476@cam.ac.uk>2009-01-18 16:13:57 +0000
committerStuart Bennett <sb476@cam.ac.uk>2009-01-19 16:37:46 +0000
commit3ef6b41a1c072d2f3545915180b522e43e0c8754 (patch)
tree369102dc2b674d3a960dcbd06cd308a6b897fa5c /src/nv_setup.c
parentc7a423a24ad7da7b510007a0d5a779999bd8cf73 (diff)
twoStagePLL is actually a description of cards using two PLL regs
Diffstat (limited to 'src/nv_setup.c')
-rw-r--r--src/nv_setup.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/nv_setup.c b/src/nv_setup.c
index b092c32..6ac6058 100644
--- a/src/nv_setup.c
+++ b/src/nv_setup.c
@@ -361,7 +361,7 @@ static void nv10GetConfig(ScrnInfoPtr pScrn)
pNv->CURSOR = NULL; /* can't set this here */
pNv->MinVClockFreqKHz = 12000;
- pNv->MaxVClockFreqKHz = pNv->twoStagePLL ? 400000 : 350000;
+ pNv->MaxVClockFreqKHz = pNv->two_reg_pll ? 400000 : 350000;
}
void
@@ -439,7 +439,7 @@ NVCommonSetup(ScrnInfoPtr pScrn)
pNv->fpScaler = (pNv->FpScale && pNv->twoHeads && implementation != CHIPSET_NV11);
/* nv30 and nv35 have two stage PLLs, but use only one register; they are dealt with separately */
- pNv->twoStagePLL = (implementation == CHIPSET_NV31) ||
+ pNv->two_reg_pll = (implementation == CHIPSET_NV31) ||
(implementation == CHIPSET_NV36) ||
(pNv->Architecture >= NV_ARCH_40);